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| 型号： | EVAL-ADUC7124QSPZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 48/108页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR ADUC7124 |
| 设计资源： | EVAL-ADUC7124 Schematic ADUC7124 Eval Brd Gerber Files |
| 标准包装： | 1 |
| 系列： | MicroConverter® ADuC7xxx |
| 类型： | MCU |
| 适用于相关产品： | ADUC7124 |
| 所含物品： | 板 |
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ADuC7124/ADuC7126
Data Sheet
Rev. C | Page 44 of 108
NONVOLATILE FLASH/EE MEMORY
The ADuC7124/ADuC7126 incorporate Flash/EE memory
technology on-chip to provide the user with nonvolatile, in-
circuit reprogrammable memory space.
Like EEPROM, flash memory can be programmed in-system
at a byte level, although it must first be erased. The erase is
performed in page blocks. As a result, flash memory is often
and more correctly referred to as Flash/EE memory.
Overall, Flash/EE memory represents a step closer to the
ideal memory device that includes nonvolatility, in-circuit
programmability, high density, and low cost. Incorporated in
the ADuC7124/ADuC7126, Flash/EE memory technology allows
the user to update program code space in-circuit, without the
need to replace one-time programmable (OTP) devices at
remote operating nodes.
Flash/EE Memory
The ADuC7124/ADuC7126 contain two 64 kB arrays of Flash/EE
memory. In the first block, the lower 62 kB is available to the
user, and the upper 2 kB of this Flash/EE program memory
array contain permanently embedded firmware, allowing in-circuit
serial download. The 2 kB of embedded firmware also contain a
power-on configuration routine that downloads factory cali-
brated coefficients to the various calibrated peripherals (band
gap references and so on). This 2 kB embedded firmware is
hidden from user code. It is not possible for the user to read, write,
or erase this page. In the second block, all 64 kB of Flash/EE
memory are available to the user.
The 126 kB of Flash/EE memory can be programmed in-circuit,
using the serial download mode or the JTAG mode provided.
Flash/EE Memory Reliability
The Flash/EE memory arrays on the parts are fully qualified for
two key Flash/EE memory characteristics: Flash/EE memory
cycling endurance and Flash/EE memory data retention.
Endurance quantifies the ability of the Flash/EE memory to be
cycled through many program, read, and erase cycles. A single
endurance cycle is composed of four independent, sequential
events, defined as
1.
Initial page erase sequence.
2.
Read/verify sequence (single Flash/EE).
3.
Byte program sequence memory.
4.
Second read/verify sequence (endurance cycle).
In reliability qualification, every half word (16-bit wide)
location of the three pages (top, middle, and bottom) in the
Flash/EE memory is cycled 10,000 times from 0x0000 to
0xFFFF. As indicated in Table 1, the Flash/EE memory
endurance qualification is carried out in accordance with
JEDEC Retention Lifetime Specification A117 over the
industrial temperature range of 40° to +125°C. The results
allow the specification of a minimum endurance figure over a
supply temperature of 10,000 cycles.
Retention quantifies the ability of the Flash/EE memory to
retain its programmed data over time. Again, the parts are
qualified in accordance with the formal JEDEC Retention
Lifetime Specification (A117) at a specific junction temperature
(TJ = 85°C). As part of this qualification procedure, the Flash/EE
memory is cycled to its specified endurance limit (see the
Flash/EE Memory section) before data retention is character-
ized. This means that the Flash/EE memory is guaranteed to
retain its data for its fully specified retention lifetime every time
the Flash/EE memory is reprogrammed. In addition, note that
retention lifetime, based on the activation energy of 0.6 eV,
150
300
450
600
30
40
55
70
85
100
125
135
150
RE
T
E
NT
IO
N
(
Y
ea
rs
)
0
09
123
-08
5
JUNCTION TEMPERATURE (°C)
Figure 39. Flash/EE Memory Data Retention
PROGRAMMING
The 62 kB of Flash/EE memory can be programmed in-circuit,
using the serial download mode or the provided JTAG mode.
Serial Downloading (In-Circuit Programming)
The ADuC7124/ADuC7126 facilitate code download via the
standard UART serial port. It is only available on UART0
(P01.0 & P1.1). The parts enter serial download mode after
a reset or power cycle if the BM pin is pulled low through
an external 1 kΩ resistor. When in serial download mode,
the user can download code to the full 126 kB of Flash/EE
memory while the device is in-circuit in its target application
hardware. An executable PC serial download is provided as
part of the development system for serial downloading via
the UART. The AN-724 application note describes the UART
download protocol.
Downloading (In-Circuit Programming) via I2C
The ADuC7126BSTZ126I and ADuC7126BSTZ126IRL models
facilitate code download via the the I2C port. The models enter
download mode after a reset or power cycle if the BM pin is
pulled low through an external 1 kΩ resistor and Flash Address
0x80014 = 0xFFFFFFFF. Once in download mode, the user can
download code to the full 126 kB of Flash/EE memory while the
device is in-circuit in its target application hardware. An executable
PC I2C download is provided as part of the development system
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| EVAL-ADUC7126QSPZ | 功能描述:BOARD EVALUATION FOR ADUC7126 RoHS:是 类别:编程器，开发系统 >> 通用嵌入式开发板和套件（MCU、DSP、FPGA、CPLD等） 系列:MicroConverter® ADuC7xxx 标准包装:1 系列:PICDEM™ 类型:MCU 适用于相关产品:PIC10F206，PIC16F690，PIC16F819 所含物品:板，线缆，元件，CD，PICkit 编程器 产品目录页面:659 (CN2011-ZH PDF) |
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| EVAL-ADUC7128QSPZ2 | 制造商:AD 制造商全称:Analog Devices 功能描述:Precision Analog Microcontroller ARM7TDMI MCU with 12-Bit ADC and DDS DAC |
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