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参数资料
型号： EVAL-ADUC7122QSPZ
厂商： Analog Devices Inc
文件页数： 52/96页
文件大小： 0K
描述： BOARD EVALUATION FOR ADUC7122
设计资源： EVAL-ADUC7122 Schematic
ADUC7122 Gerber Files
ADUC7122 BOM
标准包装： 1
系列： MicroConverter® ADuC7xxx
类型： MCU
适用于相关产品： ADUC7122
所含物品： 板
ADuC7122
Rev. 0 | Page 56 of 96
Table 95. COMCON0 MMR Bit Designations
Bit
Name
Description
7
DLAB
Divisor latch access.
Set by the user to enable access to COMDIV0 and COMDIV1 registers.
Cleared by the user to disable access to COMDIV0 and COMDIV1 and enable access to COMRX,
COMTX, and COMIEN0.
6
BRK
Set break.
Set by the user to force TxD to 0.
Cleared to operate in normal mode.
5
SP
Stick parity.
Set by the user to force parity to defined values.
1 if EPS = 1 and PEN = 1.
0 if EPS = 0 and PEN = 1.
4
EPS
Even parity select bit.
Set for even parity.
Cleared for odd parity.
3
PEN
Parity enable bit.
Set by the user to transmit and check the parity bit.
Cleared by the user for no parity transmission or checking.
2
STOP
Stop bit.
Set by the user to transmit 1.5 stop bits if the word length is 5 bits, or 2 stop bits if the word length
is 6, 7, or 8 bits. The receiver checks the first stop bit only, regardless of the number of stop bits
selected.
Cleared by the user to generate one stop bit in the transmitted data.
1 to 0
WLS
Word length select.
00 = 5 bits.
01 = 6 bits.
10 = 7 bits.
11 = 8 bits.
UART Control Register 1
This 8-bit register controls the operation of the UART in
conjunction with COMCON0.
Name:
COMCON1
Address:
0xFFFF0810
Default Value:
0x00
Access:
Read/write
Table 96. COMCON1 MMR Bit Designations
Bit
Name
Description
7:5
Reserved bits. Not used.
4
Loopback
Set by the user to enable loopback mode. In
loopback mode, the TxD is forced high.
3:2
Reserved bits. Not used.
1
RTS
Request to send.
Set by the user to force the RTS output to 0.
Cleared by the user to force the RTS output
to 1.
0
DTR
Data terminal ready.
Set by the user to force the DTR output to 0.
Cleared by the user to force the DTR output
to 1.
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