参数资料
型号: W947D2HBJX5E
厂商: Winbond Electronics
文件页数: 48/60页
文件大小: 0K
描述: IC LPDDR SDRAM 128MBIT 90VFBGA
标准包装: 240
格式 - 存储器: RAM
存储器类型: 移动 LPDDR SDRAM
存储容量: 128M(4Mx32)
速度: 200MHz
接口: 并联
电源电压: 1.7 V ~ 1.95 V
工作温度: -25°C ~ 85°C
封装/外壳: 90-TFBGA
供应商设备封装: 90-VFBGA(8x13)
包装: 托盘
W947D6HB / W947D2HB
128Mb Mobile LPDDR
8.4 IDD Specification Parameters and Test Conditions
8.4.1 IDD Specification Parameters and Test Conditions
[Recommended Operating Conditions; Notes 1-3]
(128Mb, X16)
PARAMETER
Operating one
bank active-
precharge
current
SYMBOL
IDD0
TEST CONDITION
tRC = tRCmin ; tCK = tCKmin ; CKE is HIGH; CS is HIGH between
valid commands; address inputs are SWITCHING; data bus inputs are
STABLE
-5
40
-6
38
- 75
35
UNIT
mA
Precharge
power-down
standby current
Precharge
power-down
standby current
with clock stop
IDD2P
IDD2PS
all banks idle, CKE is LOW; CS is HIGH, tCK = tCKmin ;
address and control inputs are SWITCHING; data bus inputs
are STABLE
all banks idle, CKE is LOW; CS is HIGH, CK = LOW, CK
= HIGH; address and control inputs are SWITCHING; data
bus inputs are STABLE
Low
power
Normal
power
Low
power
Normal
power
0.23
0.28
0.23
0.28
0.23
0.28
0.23
0.28
0.23
0.28
0.23
0.28
mA
mA
Precharge non
power-down
standby current
Precharge non
power-down
standby current
with clock stop
Active power-
down standby
current
Active power-
down standby
current with clock
stop
Active non
power-down
standby current
Active non
power-down
standby current
with clock stop
Operating burst
read current
Operating burst
write current
Auto-Refresh
Current
Deep Power-
Down current
IDD2N
IDD2NS
IDD3P
IDD3PS
IDD3N
IDD3NS
IDD4R
IDD4W
IDD5
IDD8(4)
all banks idle, CKE is HIGH; CS is HIGH, tCK = tCKmin; address and
control inputs are SWITCHING; data bus inputs are STABLE
all banks idle, CKE is HIGH; CS is HIGH, CK = LOW, CK = HIGH;
address and control inputs are SWITCHING; data bus inputs are
STABLE
one bank active, CKE is LOW; CS is HIGH, tCK = tCKmin;address
and control inputs are SWITCHING; data bus inputs are STABLE
one bank active, CKE is LOW; CS is HIGH, CK = LOW, CK =
HIGH; address and control inputs are SWITCHING; data bus inputs are
STABLE
one bank active, CKE is HIGH; CS is HIGH, tCK = tCKmin; address
and control inputs are SWITCHING; data bus inputs are STABLE
one bank active, CKE is HIGH; CS is HIGH, CK = LOW, CK =
HIGH; address and control inputs are SWITCHING; data bus inputs are
STABLE
one bank active; BL = 4; CL = 3; tCK = tCKmin ; continuous read bursts;
IOUT = 0 mA; address inputs are SWITCHING; 50% data change each
burst transfer
one bank active; BL = 4; t CK = t CKmin ; continuous write
bursts; address inputs are SWITCHING; 50% data change
each burst transfer
tRC = tRFCmin ; tCK = tCKmin ; burst refresh; CKE is
HIGH; address and control inputs are SWITCHING; data bus inputs are
STABLE
Address and control inputs are STABLE; data bus inputs are STABLE
10
3
3
3
25
15
75
55
50
10
10
3
3
3
20
12
70
50
50
10
10
3
3
3
20
12
70
50
50
10
mA
mA
mA
mA
mA
mA
mA
mA
mA
uA
Publication Release Date:Jun,17, 2011
- 48 -
Revision A01-003
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W947D6HBHX5E 功能描述:IC LPDDR SDRAM 128MBIT 60VFBGA RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:1 系列:- 格式 - 存储器:闪存 存储器类型:闪存 - NAND 存储容量:4G(256M x 16) 速度:- 接口:并联 电源电压:2.7 V ~ 3.6 V 工作温度:0°C ~ 70°C 封装/外壳:48-TFSOP(0.724",18.40mm 宽) 供应商设备封装:48-TSOP I 包装:Digi-Reel® 其它名称:557-1461-6