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| 型号： | W947D2HBJX5E |
| 厂商： | Winbond Electronics |
| 文件页数： | 2/60页 |
| 文件大小： | 0K |
| 描述： | IC LPDDR SDRAM 128MBIT 90VFBGA |
| 标准包装： | 240 |
| 格式 - 存储器： | RAM |
| 存储器类型： | 移动 LPDDR SDRAM |
| 存储容量： | 128M（4Mx32） |
| 速度： | 200MHz |
| 接口： | 并联 |
| 电源电压： | 1.7 V ~ 1.95 V |
| 工作温度： | -25°C ~ 85°C |
| 封装/外壳： | 90-TFBGA |
| 供应商设备封装： | 90-VFBGA（8x13） |
| 包装： | 托盘 |
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W947D6HB / W947D2HB
128Mb Mobile LPDDR
7.3 Mode Register Set .......................................................................................................................... 25
7.3.1 Mode Register Set Command ...............................................................................................................25
7.3.2 Mode Register Set Command Timing ...................................................................................................26
7.4. Active ............................................................................................................................................ 26
7.4.1 Active Command ...................................................................................................................................26
7.4.2 Bank Activation Command Cycle ..........................................................................................................27
7.5. Read ............................................................................................................................................. 27
7.5.1 Read Command ....................................................................................................................................28
7.5.2 Basic Read Timing Parameters ............................................................................................................28
7.5.3 Read Burst Showing CAS Latency .......................................................................................................29
7.5.4 Read to Read ........................................................................................................................................29
7.5.5 Consecutive Read Bursts ......................................................................................................................30
7.5.6 Non-Consecutive Read Bursts ..............................................................................................................30
7.5.7 Random Read Bursts ............................................................................................................................31
7.5.8 Read Burst Terminate ...........................................................................................................................31
7.5.9 Read to Write ........................................................................................................................................32
7.5.10 Read to Pre-charge .............................................................................................................................32
7.5.11 Burst Terminate of Read .....................................................................................................................33
7.6 Write............................................................................................................................................... 33
7.6.1 Write Command ....................................................................................................................................34
7.6.2 Basic Write Timing Parameters.............................................................................................................34
7.6.3 Write Burst (min. and max. tDQSS) ......................................................................................................35
7.6.4 Write to Write.........................................................................................................................................35
7.6.5 Concatenated Write Bursts ...................................................................................................................36
7.6.6 Non-Consecutive Write Bursts ..............................................................................................................36
7.6.7 Random Write Cycles ...........................................................................................................................37
7.6.8 Write to Read ........................................................................................................................................37
7.6.9 Non-Interrupting Write to Read .............................................................................................................37
7.6.10 Interrupting Write to Read ...................................................................................................................38
7.6.11 Write to Precharge ..............................................................................................................................38
7.6.12 Non-Interrupting Write to Precharge ...................................................................................................38
7.6.13 Interrupting Write to Precharge ...........................................................................................................39
7.7 Precharge....................................................................................................................................... 39
7.7.1 Precharge Command ............................................................................................................................40
7.8 Auto Precharge .............................................................................................................................. 40
7.9 Refresh Requirements.................................................................................................................... 40
7.10 Auto Refresh ................................................................................................................................ 40
7.10.1 Auto Refresh Command ......................................................................................................................41
7.11 Self Referesh................................................................................................................................ 41
7.11.1 Self Refresh Command .......................................................................................................................42
7.11.2 Auto Refresh Cycles Back-to-Back .....................................................................................................42
7.11.3 Self Refresh Entry and Exit .................................................................................................................43
7.12 Power Down ................................................................................................................................. 43
7.12.1 Power-Down Entry and Exit ................................................................................................................43
7.13 Deep Power Down........................................................................................................................ 44
Publication Release Date:Jun,17, 2011
- 2 -
Revision A01-003
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相关代理商/技术参数 |
参数描述 |
|---|---|
| W947D2HBJX5I | 制造商:WINBOND 制造商全称:Winbond 功能描述:128Mb Mobile LPDDR |
| W947D2HBJX6E | 制造商:Winbond Electronics Corp 功能描述:IC LPDDR SDRAM 128MBIT 90VFBGA |
| W947D2HBJX6G | 制造商:WINBOND 制造商全称:Winbond 功能描述:128Mb Mobile LPDDR |
| W947D6HB | 制造商:WINBOND 制造商全称:Winbond 功能描述:128Mb Mobile LPDDR |
| W947D6HBHX5E | 功能描述:IC LPDDR SDRAM 128MBIT 60VFBGA RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:1 系列:- 格式 - 存储器:闪存 存储器类型:闪存 - NAND 存储容量:4G（256M x 16） 速度:- 接口:并联 电源电压:2.7 V ~ 3.6 V 工作温度:0°C ~ 70°C 封装/外壳:48-TFSOP（0.724"，18.40mm 宽） 供应商设备封装:48-TSOP I 包装:Digi-Reel® 其它名称:557-1461-6 |
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