- 您现在的位置：买卖IC网 > PDF目录17109 > EVAL-ADUC7023QSPZ (Analog Devices Inc)KIT DEV FOR ADUC7023 QUICK START PDF资料下载
参数资料
| 型号： | EVAL-ADUC7023QSPZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 74/96页 |
| 文件大小： | 0K |
| 描述： | KIT DEV FOR ADUC7023 QUICK START |
| 标准包装： | 1 |
| 类型： | MCU |
| 适用于相关产品： | ARM7TDMI |
| 所含物品： | 板 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页当前第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页
ADuC7023
Data Sheet
| Page 76 of 96
PROCESSOR REFERENCE PERIPHERALS
INTERRUPT SYSTEM
There are 22 interrupt sources on the ADuC7023 that are
controlled by the interrupt controller. Most interrupts are
generated from the on-chip peripherals, such as ADC. Four
additional interrupt sources are generated from external interrupt
request pins, IRQ0, IRQ1, IRQ2, and IRQ3. The ARM7TDMI
CPU core only recognizes interrupts as one of two types, a
normal interrupt request IRQ or a fast interrupt request FIQ.
All the interrupts can be masked separately.
The control and configuration of the interrupt system is managed
through nine interrupt related registers, four dedicated to IRQ,
and four dedicated to FIQ. An additional MMR is used to select
the programmed interrupt source. The bits in each IRQ and
FIQ registers represent the same interrupt source as described
The ADuC7023 contains a vectored interrupt controller (VIC)
that supports nested interrupts up to eight levels. The VIC also
allows the programmer to assign priority levels to all interrupt
sources. Interrupt nesting is enabled by setting the ENIRQN bit
in the IRQCONN register. A number of extra MMRs are used
when the full-vectored interrupt controller is enabled.
IRQSTA/FIQSTA should be saved immediately upon entering
the interrupt service routine (ISR) to ensure that all valid
interrupt sources are serviced.
Table 88. IRQ/FIQ MMRs Bit Description
Bit
Description
0
All interrupts OR’ed (FIQ only).
1
SWI.
2
Timer0.
3
Timer1.
4
Watchdog timer (Timer 2).
5
Flash control.
6
ADC channel.
7
PLL lock.
8
I2C0 master.
9
I2C0 slave.
10
I2C1 master.
11
I2C1 slave.
12
SPI.
13
External IRQ0.
14
Comparator.
15
PSM.
16
External IRQ1.
17
PLA IRQ0.
18
External IRQ2.
19
External IRQ3.
20
PLA IRQ1.
21
PWM.
IRQ
The interrupt request (IRQ) is the exception signal to enter the
IRQ mode of the processor. It is used to service general-purpose
interrupt handling of internal and external events.
The four 32-bit registers dedicated to IRQ are: IRQSTA, IRQSIG,
IRQEN, and IRQCLR.
IRQSTA Register
Name:
IRQSTA
Address:
0xFFFF0000
Default value:
0x00000000
Access:
Read
Function:
IRQSTA (read-only register) provides the
current-enabled IRQ source status. When
set to 1, that source generates an active IRQ
request to the ARM7TDMI core. There is no
priority encoder or interrupt vector
generation. This function is implemented in
software in a common interrupt handler
routine. All 32 bits are logically OR’ed to
create the IRQ signal to the ARM7TDMI
core.
IRQSIG Register
Name:
IRQSIG
Address:
0xFFFF0004
Default value:
0x00XXX000
Access:
Read
Function:
IRQSIG reflects the status of the different IRQ
sources. If a peripheral generates an IRQ
signal, the corresponding bit in the IRQSIG is
set; otherwise, it is cleared. The IRQSIG bits
are cleared when the interrupt in the
particular peripheral is cleared. All IRQ
sources can be masked in the IRQEN MMR.
IRQSIG is read-only.
Rev. E
相关PDF资料 |
PDF描述 |
|---|---|
| RPS-1K-6-250/2.0-9 | HEAT SHRINK SLEEVE |
| ECM30DCWH | CONN EDGECARD 60POS DIP .156 SLD |
| SC43B-3R3 | INDUCTOR SMD 3.3UH 1.44A 7.96MHZ |
| EVAL-ADUC842QSPZ | KIT DEV QUICK START ADUC842 |
| EVAL-ADUC841QSPZ | KIT DEV QUICK START ADUC841 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| EVAL-ADUC7023QSPZ1 | 功能描述:BOARD EVAL FOR ADUC7023 RoHS:是 类别:编程器，开发系统 >> 通用嵌入式开发板和套件（MCU、DSP、FPGA、CPLD等） 系列:QuickStart™ PLUS 套件 产品培训模块:Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services 特色产品:Blackfin? BF50x Series Processors 标准包装:1 系列:Blackfin® 类型:DSP 适用于相关产品:ADSP-BF548 所含物品:板，软件，4x4 键盘，光学拨轮，QVGA 触摸屏 LCD 和 40G 硬盘 配用:ADZS-BFBLUET-EZEXT-ND - EZ-EXTENDER DAUGHTERBOARDADZS-BFLLCD-EZEXT-ND - BOARD EXT LANDSCAP LCD INTERFACE 相关产品:ADSP-BF542BBCZ-4A-ND - IC DSP 16BIT 400MHZ 400CSBGAADSP-BF544MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542KBCZ-6A-ND - IC DSP 16BIT 600MHZ 400CSBGAADSP-BF547MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF548BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF547BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF544BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF542BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGA |
| EVAL-ADuC7023QSPZ2 | 制造商:AD 制造商全称:Analog Devices 功能描述:Precision Analog Microcontroller, 12-Bit Analog I/O, ARM7TDMI MCU with Enhanced IRQ Handler |
| EVALADUC7023QSPZU1 | 制造商:Analog Devices 功能描述: |
| EVAL-ADUC7024QS | 制造商:Analog Devices 功能描述:QUICK START DEVELOPMENT SYSTEM - Bulk |
| EVAL-ADUC7024QS-U2 | 制造商:Analog Devices 功能描述:QUICK START DEVL SYST EVAL BOARD I.C. - Bulk |
发布紧急采购，3分钟左右您将得到回复。