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| 型号： | EVAL-ADUC7126QSPZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 70/108页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR ADUC7126 |
| 设计资源： | EVAL-ADUC7126 Schematic ADUC7126 Gerber Files |
| 标准包装： | 1 |
| 系列： | MicroConverter® ADuC7xxx |
| 类型： | MCU |
| 适用于相关产品： | ADUC7126 |
| 所含物品： | 板 |
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ADuC7124/ADuC7126
Data Sheet
Rev. C | Page 64 of 108
COM1CON0 Register
Name:
COM1CON0
Address:
0xFFFF074C
Default Value:
0x00
Access:
Read/write
COM1CON0 is the line control register for UART1.
Table 95. COMxCON0 MMR Bit Descriptions
Bit
Name
Description
7
DLAB
Divisor latch access.
Set by the user to enable access to the
COMxDIV0 and COMxDIV1 registers.
Cleared by the user to disable access to
COMxDIV0 and COMxDIV1 and enable access to
COMxRX and COMxTX.
6
BRK
Set break.
Set by the user to force SOUTx to 0.
Cleared to operate in normal mode.
5
SP
Stick parity.
Set by the user to force parity to defined values:
1 if EPS = 1 and PEN = 1, 0 if EPS = 0 and PEN = 1.
4
EPS
Even parity select bit.
Set for even parity.
Cleared for odd parity.
3
PEN
Parity enable bit.
Set by the user to transmit and check the
parity bit.
Cleared by the user for no parity transmission or
checking.
2
Stop
Stop bit.
Set by the user to transmit 1 stop bits if the word
length is five bits or two stop bits if the word
length is six bits, seven bits, or eight bits. The
receiver checks the first stop bit only, regardless
of the number of stop bits selected.
Cleared by the user to generate one stop bit in
the transmitted data.
[1:0]
WLS
Word length select:
00 = five bits, 01 = six bits, 10 = seven bits, 11 =
eight bits.
COM0CON1 Register
Name:
COM0CON1
Address:
0xFFFF0710
Default Value:
0x00
Access:
Read/write
COM0CON1 is the modem control register for UART0.
COM1CON1 Register
Name:
COM1CON1
Address:
0xFFFF0750
Default Value:
0x00
Access:
Read/write
COM1CON1 is the modem control register for UART1.
Table 96. COMxCON1 MMR Bit Descriptions
Bit
Name
Description
[7:5]
Reserved.
4
LOOPBACK
Loop back.
Set by the user to enable loopback mode.
In loopback mode, SOUTx is forced high.
The modem signals are also directly con-
nected to the status inputs (RTS to CTS and
DTR to DSR).
Cleared by the user to be in normal mode.
3
PEN
Parity enable bit.
Set by the user to transmit and check the
parity bit.
Cleared by the user for no parity transmission
or checking.
2
Stop
Stop bit.
Set by the user to transmit 1 stop bits if
the word length is five bits or two stop bits
if the word length is six bits, seven bits, or
eight bits. The receiver checks the first stop
bit only, regardless of the number of stop
bits selected.
Cleared by the user to generate one stop
bit in the transmitted data.
1
RTS
Request to send.
Set by the user to force the RTS output to 0.
Cleared by the user to force the RTS output
to 1.
0
DTR
Data terminal ready.
Set by the user to force the DTR output to
0.
Cleared by the user to force the DTR output
to 1.
COM0STA0 Register
Name:
COM0STA0
Address:
0xFFFF0714
Default Value:
0xE0
Access:
Read only
COM0STA0 is the line status register for UART0.
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