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| 型号： | W9751G6KB-25 |
| 厂商： | Winbond Electronics |
| 文件页数： | 40/87页 |
| 文件大小： | 0K |
| 描述： | IC DDR2 SDRAM 512MBIT 84WBGA |
| 标准包装： | 209 |
| 格式 - 存储器： | RAM |
| 存储器类型： | DDR2 SDRAM |
| 存储容量： | 512M（32Mx16） |
| 速度： | 2.5ns |
| 接口： | 并联 |
| 电源电压： | 1.7 V ~ 1.9 V |
| 工作温度： | 0°C ~ 85°C |
| 封装/外壳： | 84-TFBGA |
| 供应商设备封装： | 84-WBGA（8x12.5） |
| 包装： | 托盘 |
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W9751G6KB
10.9 DC Characteristics
-18
-25/25I/25A/25K
-3
SYM.
CONDITIONS
MAX.
MAX.
MAX.
UNIT
NOTES
Operating Current - One Bank Active-Precharge
I DD0
t CK = t CK(IDD) , t RC = t RC(IDD) , t RAS = t RASmin(IDD) ;
CKE is HIGH, CS is HIGH between valid commands;
Address and control inputs are SWITCHING;
105
90
80
mA
1,2,3,4,5,
6
Databus inputs are SWITCHING.
Operating Current - One Bank Active-Read-
Precharge
I OUT = 0 mA;
BL = 4, CL = CL (IDD) , AL = 0;
I DD1
t CK = t CK(IDD) , t RC = t RC(IDD) , t RAS = t RASmin(IDD) ,
t RCD = t RCD(IDD) ;
115
100
90
mA
1,2,3,4,5,
6
CKE is HIGH, CS is HIGH between valid commands;
Address and control inputs are SWITCHING;
Data bus inputs are SWITCHING.
Precharge Power-Down Current
All banks idle;
I DD2P
t CK = t CK(IDD) ;
CKE is LOW;
8
8
8
mA
1,2,3,4,5,
6,7
Other control and address inputs are STABLE;
Data Bus inputs are FLOATING. (T CASE ≤ 85°C)
Precharge Standby Current
All banks idle;
I DD2N
t CK = t CK(IDD) ;
CKE is HIGH, CS is HIGH;
50
45
40
mA
1,2,3,4,5,
6
Other control and address inputs are SWITCHING;
Data bus inputs are SWITCHING.
Precharge Quiet Standby Current
All banks idle;
I DD2Q
t CK = t CK(IDD) ;
CKE is HIGH, CS is HIGH;
40
35
35
mA
1,2,3,4,5,
6
Other control and address inputs are STABLE;
Data bus inputs are FLOATING.
I DD3PF
Active Power-Down Current
All banks open;
t CK = t CK(IDD) ;
Fast PDN Exit
MRS(12) = 0
15
15
15
mA
1,2,3,4,5,
6
CKE is LOW;
Other control and address inputs are
I DD3PS
STABLE;
Data bus inputs are FLOATING.
Slow PDN Exit
MRS(12) = 1
12
12
12
mA
1,2,3,4,5,
6,7
(T CASE ≤ 85°C)
Active Standby Current
All banks open;
I DD3N
t CK = t CK(IDD) ; t RAS = t RASmax(IDD) , t RP = t RP(IDD) ;
CKE is HIGH, CS is HIGH between valid commands;
75
65
60
mA
1,2,3,4,5,
6
Other control and address inputs are SWITCHING;
Data bus inputs are SWITCHING.
Publication Release Date: Sep. 03, 2012
- 40 -
Revision A04
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相关代理商/技术参数 |
参数描述 |
|---|---|
| W9751G6KB25A | 制造商:WINBOND 制造商全称:Winbond 功能描述:Double Data Rate architecture: two data transfers per clock cycle |
| W9751G6KB25I | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip DDR2 SDRAM 512M-Bit 32Mx16 1.8V 84-Pin WBGA 制造商:Winbond Electronics Corp 功能描述:IC DDR2 SDRAM 512MBIT 2.5NS BGA |
| W9751G6KB25K | 制造商:WINBOND 制造商全称:Winbond 功能描述:Double Data Rate architecture: two data transfers per clock cycle |
| W9751G6KB25TR | 制造商:Winbond Electronics Corp 功能描述:512M DDR2-800, X16 制造商:Winbond 功能描述:512M DDR2-800, X16 |
| W9751G6KB-3 | 制造商:WINBOND 制造商全称:Winbond 功能描述:Double Data Rate architecture: two data transfers per clock cycle |
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