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参数资料
| 型号： | W9751G6KB-25 |
| 厂商： | Winbond Electronics |
| 文件页数： | 35/87页 |
| 文件大小： | 0K |
| 描述： | IC DDR2 SDRAM 512MBIT 84WBGA |
| 标准包装： | 209 |
| 格式 - 存储器： | RAM |
| 存储器类型： | DDR2 SDRAM |
| 存储容量： | 512M（32Mx16） |
| 速度： | 2.5ns |
| 接口： | 并联 |
| 电源电压： | 1.7 V ~ 1.9 V |
| 工作温度： | 0°C ~ 85°C |
| 封装/外壳： | 84-TFBGA |
| 供应商设备封装： | 84-WBGA（8x12.5） |
| 包装： | 托盘 |
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W9751G6KB
Function Truth Table, continued
CURRENT
STATE
Write
Recovering
Write
Recovering
with Auto-
precharge
Refreshing
Mode
Register
Accessing
CS
H
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
RAS
X
H
H
H
L
L
L
L
X
H
H
H
L
L
L
L
X
H
H
H
L
L
L
L
X
H
H
H
L
L
L
L
CAS
X
H
L
L
H
H
L
L
X
H
L
L
H
H
L
L
X
H
L
L
H
H
L
L
X
H
L
L
H
H
L
L
WE
X
H
H
L
H
L
H
L
X
H
H
L
H
L
H
L
X
H
H
L
H
L
H
L
X
H
H
L
H
L
H
L
ADDRESS
X
X
BA, CA, A10
BA, CA, A10
BA, RA
BA, A10
X
Op-Code
X
X
BA, CA, A10
BA, CA, A10
BA, RA
BA, A10
X
Op-Code
X
X
BA, CA, A10
BA, CA, A10
BA, RA
BA, A10
X
Op-Code
X
X
BA, CA, A10
BA, CA, A10
BA, RA
BA, A10
X
Op-Code
COMMAND
DSL
NOP
READ/READA
WRIT/WRITA
ACT
PRE/PREA
REF/SELF
MRS/EMRS
DSL
NOP
READ/READA
WRIT/WRITA
ACT
PRE/PREA
REF/SELF
MRS/EMRS
DSL
NOP
READ/READA
WRIT/WRITA
ACT
PRE/PREA
REF/SELF
MRS/EMRS
DSL
NOP
READ/READA
WRIT/WRITA
ACT
PRE/PREA
REF/SELF
MRS/EMRS
ACTION
NOP-> Bank active after t WR
NOP-> Bank active after t WR
ILLEGAL
New write
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
NOP-> Precharge after t WR
NOP-> Precharge after t WR
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
NOP-> Idle after t RC
NOP-> Idle after t RC
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
NOP-> Idle after t MRD
NOP-> Idle after t MRD
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
NOTES
1
1
1
1
1
1
1
Notes:
1. This command may be issued for other banks, depending on the state of the banks.
2. All banks must be in “ IDLE ” .
3. Read or Write burst interruption is prohibited for burst length of 4 and only allowed for burst length of 8. Burst read/write can
only be interrupted by another read/write with 4 bit burst boundary. Any other case of read/write interrupt is not allowed.
Remark: H = High level, L = Low level, X = High or Low level ( Don?t Care ), V = Valid data.
Publication Release Date: Sep. 03, 2012
- 35 -
Revision A04
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相关代理商/技术参数 |
参数描述 |
|---|---|
| W9751G6KB25A | 制造商:WINBOND 制造商全称:Winbond 功能描述:Double Data Rate architecture: two data transfers per clock cycle |
| W9751G6KB25I | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip DDR2 SDRAM 512M-Bit 32Mx16 1.8V 84-Pin WBGA 制造商:Winbond Electronics Corp 功能描述:IC DDR2 SDRAM 512MBIT 2.5NS BGA |
| W9751G6KB25K | 制造商:WINBOND 制造商全称:Winbond 功能描述:Double Data Rate architecture: two data transfers per clock cycle |
| W9751G6KB25TR | 制造商:Winbond Electronics Corp 功能描述:512M DDR2-800, X16 制造商:Winbond 功能描述:512M DDR2-800, X16 |
| W9751G6KB-3 | 制造商:WINBOND 制造商全称:Winbond 功能描述:Double Data Rate architecture: two data transfers per clock cycle |
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