参数资料
型号: 440EP
厂商: Applied Micro Circuits Corp.
英文描述: Power PC 440EP Embedded Processor
中文描述: 440EP的Power PC嵌入式处理器
文件页数: 62/84页
文件大小: 541K
代理商: 440EP
AMCC Proprietary
65
440EP – PPC440EP Embedded Processor
Data Sheet
Revision 1.26 – April 25, 2007
I/O Specifications
Table 15. Peripheral Interface Clock Timings
Parameter
Min
Max
Units
Notes
PCIClk input frequency (asynchronous mode)
66.66
MHz
PCIClk period (asynchronous mode)
15
ns
PCIClk input high time
40% of nominal period
60% of nominal period
ns
PCIClk input low time
40% of nominal period
60% of nominal period
ns
EMCMDClk output frequency
2.5
MHz
EMCMDClk period
400
ns
EMCMDClk output high time
160
ns
EMCMDClk output low time
160
ns
EMCTxClk input frequency MII(RMII)
2.5(5)
25(50)
MHz
EMCTxClk period MII(RMII)
40(20)
400(200)
ns
EMCTxClk input high time
35% of nominal period
ns
EMCTxClk input low time
35% of nominal period
ns
EMCRxClk input frequency MII(RMII)
2.5(5)
25(50)
MHz
EMCRxClk period MII(RMII)
40(20)
400(200)
ns
EMCRxClk input high time
35% of nominal period
ns
EMCRxClk input low time
35% of nominal period
ns
PerClk (and OPB clock) output frequency (for ext. master or
sync. slaves)
–66.66
MHz
PerClk period
15
ns
PerClk output high time
50% of nominal period
66% of nominal period
ns
PerClk output low time
33% of nominal period
50% of nominal period
ns
UARTSerClk input frequency
1000/(2TOPB
1+2ns)
MHz
1
UARTSerClk period
2TOPB+2
–ns
1
UARTSerClk input high time
TOPB+1
–ns
1
UARTSerClk input low time
TOPB+1
–ns
1
USB2Clk input frequency
60
MHz
USB1Clk input frequency
48
MHz
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