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参数资料
| 型号： | 440EP |
| 厂商： | Applied Micro Circuits Corp. |
| 英文描述： | Power PC 440EP Embedded Processor |
| 中文描述： | 440EP的Power PC嵌入式处理器 |
| 文件页数： | 53/84页 |
| 文件大小： | 541K |
| 代理商： | 440EP |
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AMCC Proprietary
57
440EP – PPC440EP Embedded Processor
Data Sheet
Revision 1.26 – April 25, 2007
System Interface
SysClk
Main system clock input.
Clock
3.3V tolerant
2.5V CMOS
SysErr
Set to 1 when a machine check is generated.
O
3.3V tolerant
2.5V CMOS
SysReset
Main system reset. External logic can drive this bidirectional
pin low (minimum of 16 cycles) to initiate a system reset. A
system reset can also be initiated by software. Implemented as
an open-drain output (two states; 0 or open circuit).
I/O
3.3V tolerant
2.5V CMOS
1, 2
Halt
Halt from external debugger.
I
3.3V LVTTL
1, 4
TmrClk
Processor timer external input clock.
I
3.3V tolerant
2.5V CMOS
GPIO00:63
General purpose I/O 0 through 63. To access these functions,
software must set DCR register bits.
I/O
Multiplex
TestEn
Test Enable.
I
3.3V LVTTL
3
RcvrInh
Receiver Inhibit. Active only when TestEn is active. Used for
manufacturing test only.
I
Multiplex
ModeCtrl
Mode Control. Active only when TestEn is active. Used for
manufacturing test only.
I
Multiplex
LeakTest
Leakage Test. Active only when TestEn is active. Used for
manufacturing test only.
I
Multiplex
RefEn
Reference Enable. Active only when TestEn is active. Used for
manufacturing test only.
I
Multiplex
DrvrInh1
Driver Inhibit. Active only when TestEn is active. Used for
manufacturing test only.
I
3.3V tolerant
2.5V CMOS
DrvrInh2
Driver Inhibit. Active only when TestEn is active. Used for
manufacturing test only.
I
3.3V LVTTL
PSROOut
Module characterization and screening. Use for test purposes
only. Tie down as specified in Note 3 for normal operation.
O
Perf screen
ring osc
1, 3
Table 6. Signal Functional Description (Sheet 8 of 9)
Notes:
1. Receiver input has hysteresis
2. Must pull up (recommended value is 3k
Ω to 3.3V)
3. Must pull down (recommended value is 1k
Ω)
4. If not used, must pull up (recommended value is 3k
Ω to 3.3V)
5. If not used, must pull down (recommended value is 1k
Ω)
6. Strapping input during reset; pull-up or pull-down required
Signal Name
Description
I/O
Type
Notes
相关PDF资料 |
PDF描述 |
|---|---|
| 440GP | Power PC 440GP Embedded Processor |
| 440GRX | PowerPC 440GRx Embedded Processor |
| 440GR | Power PC 440GR Embedded Processor |
| 440GX | Power PC 440GX Embedded Processor |
| 440SPE | PowerPC 440SPe Embedded Processor |
相关代理商/技术参数 |
参数描述 |
|---|---|
| 440E-P13045 | 制造商:ALLEN-BRADLEY 制造商全称:Allen-Bradley 功能描述:440H-P03035 |
| 440EPX | 制造商:AMCC 制造商全称:Applied Micro Circuits Corporation 功能描述:PowerPC 440EPx Embedded Processor |
| 440ES001B1434-4 | 功能描述:环形MIL规格后盖 CRIMIP RING ADPTR DC STRAIGHT RoHS:否 制造商:Amphenol PCD MIL 类型:MIL-DTL-38999 III, IV 系列:AS85049 产品类型:Environmental EMI/RFI Backshells 外壳类型:Straight 外壳大小:18 外壳材质:Aluminum Alloy |
| 440ES031M1633-3B | 功能描述:环形MIL规格后盖 BND/SHRNK BOOT ADPTR DC STRAIGHT BAND RoHS:否 制造商:Amphenol PCD MIL 类型:MIL-DTL-38999 III, IV 系列:AS85049 产品类型:Environmental EMI/RFI Backshells 外壳类型:Straight 外壳大小:18 外壳材质:Aluminum Alloy |
| 440ES031M2003-3B | 功能描述:环形MIL规格后盖 BND/SHRNK BOOT ADPTR DC STRAIGHT BAND RoHS:否 制造商:Amphenol PCD MIL 类型:MIL-DTL-38999 III, IV 系列:AS85049 产品类型:Environmental EMI/RFI Backshells 外壳类型:Straight 外壳大小:18 外壳材质:Aluminum Alloy |
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