参数资料
型号: W9751G6IB-25
厂商: Winbond Electronics
文件页数: 40/86页
文件大小: 0K
描述: IC DDR2-800 SDRAM 512MB 84-WBGA
标准包装: 210
格式 - 存储器: RAM
存储器类型: DDR2 SDRAM
存储容量: 512M(32Mx16)
速度: 2.5ns
接口: 并联
电源电压: 1.7 V ~ 1.9 V
工作温度: 0°C ~ 85°C
封装/外壳: 84-TFBGA
供应商设备封装: 84-WBGA(8x12.5)
包装: 托盘
W9751G6IB
9.9
9.9.1
DC Characteristics
DC Characteristics for 25F/-25/-3 speed grades
25F
? 25
? 3
SYM.
CONDITIONS
MAX.
MAX.
MAX.
UNIT
NOTE
Operating Current - One Bank Active-Precharge
I DD0
t CK = t CK(IDD) , t RC = t RC(IDD) , t RAS = t RASmin(IDD) ;
CKE is HIGH, CS is HIGH between valid commands;
Address and control inputs are SWITCHING;
95
94
84
mA
1,2,3,4,
5,6
Databus inputs are SWITCHING.
Operating Current - One Bank Active-Read-Precharge
I OUT = 0 mA;
BL = 4, CL = CL (IDD) , AL = 0;
I DD1
t CK = t CK(IDD) , t RC = t RC(IDD) , t RAS = t RASmin(IDD) , t RCD =
t RCD(IDD) ;
110
109
94
mA
1,2,3,4,
5,6
CKE is HIGH, CS is HIGH between valid commands;
Address and control inputs are SWITCHING;
Data bus inputs are SWITCHING.
Precharge Power-Down Current
All banks idle;
I DD2P
t CK = t CK(IDD) ;
CKE is LOW;
8
8
8
mA
1,2,3,4,
5,6
Other control and address inputs are STABLE;
Data Bus inputs are FLOATING.
Precharge Standby Current
All banks idle;
I DD2N
t CK = t CK(IDD) ;
CKE is HIGH, CS is HIGH;
50
50
40
mA
1,2,3,4,
5,6
Other control and address inputs are SWITCHING;
Data bus inputs are SWITCHING.
Precharge Quiet Standby Current
All banks idle;
I DD2Q
t CK = t CK(IDD) ;
CKE is HIGH, CS is HIGH;
42
42
38
mA
1,2,3,4,
5,6
Other control and address inputs are STABLE;
Data bus inputs are FLOATING.
I DD3PF
I DD3PS
Active Power-Down Current
All banks open;
t CK = t CK(IDD) ;
CKE is LOW;
Other control and address inputs are
STABLE;
Data bus inputs are FLOATING.
Fast PDN Exit
MRS(12) = 0
Slow PDN Exit
MRS(12) = 1
30
12
30
12
28
12
mA
1,2,3,4,
5,6
Active Standby Current
All banks open;
I DD3N
t CK = t CK(IDD) ; t RAS = t RASmax(IDD) , t RP = t RP(IDD) ;
CKE is HIGH, CS is HIGH between valid commands;
55
55
48
mA
1,2,3,4,
5,6
Other control and address inputs are SWITCHING;
Data bus inputs are SWITCHING.
Publication Release Date: Oct. 23, 2009
- 40 -
Revision A06
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