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参数资料
型号： TMDXCNCD28069ISO
厂商： Texas Instruments
文件页数： 58/174页
文件大小： 0K
描述： EVAL PICCOLO CONTROLCARD
标准包装： 1
系列： TMS320F2806x, Piccolo™, C2000™
主要目的： 接口，RS232，GPIO
嵌入式： 是，MCU，32 位
已用 IC / 零件： TMS320F2806x
已供物品： 板
WAKE INT
(A)(B)
XCLKOUT
Address/Data
(internal)
td(WAKEIDLE)
tw(WAKEINT)
TMS320F28069, TMS320F28068, TMS320F28067, TMS320F28066
TMS320F28065, TMS320F28064, TMS320F28063, TMS320F28062
SPRS698D – NOVEMBER 2010 – REVISED DECEMBER 2012
www.ti.com
5.23.1.4 Low-Power Mode Wakeup Timing
Table 5-70 shows the timing requirements, Table 5-71 shows the switching characteristics, and Figure 5-
54 shows the timing diagram for IDLE mode.
Table 5-70. IDLE Mode Timing Requirements(1)
MIN
MAX
UNIT
Without input qualifier
2tc(SCO)
tw(WAKE-INT)
Pulse duration, external wake-up signal
cycles
With input qualifier
5tc(SCO) + tw(IQSW)
(1)
For an explanation of the input qualifier parameters, see Table 5-69.
Table 5-71. IDLE Mode Switching Characteristics(1)
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
Delay time, external wake signal to program execution resume (2)
cycles
Without input qualifier
20tc(SCO)
cycles
Wake-up from Flash
–
Flash module in active state
With input qualifier
20tc(SCO) + tw(IQSW)
td(WAKE-IDLE)
Without input qualifier
1050tc(SCO)
cycles
Wake-up from Flash
–
Flash module in sleep state
With input qualifier
1050tc(SCO) + tw(IQSW)
Without input qualifier
20tc(SCO)
cycles
Wake-up from SARAM
With input qualifier
20tc(SCO) + tw(IQSW)
(1)
For an explanation of the input qualifier parameters, see Table 5-69.
(2)
This is the time taken to begin execution of the instruction that immediately follows the IDLE instruction. execution of an ISR (triggered
by the wake-up) signal involves additional latency.
A.
WAKE INT can be any enabled interrupt, WDINT or XRS. After the IDLE instruction is executed, a delay of 5
OSCCLK cycles (minimum) is needed before the wake-up signal could be asserted.
B.
From the time the IDLE instruction is executed to place the device into low-power mode (LPM), wakeup should not be
initiated until at least 4 OSCCLK cycles have elapsed.
Figure 5-54. IDLE Entry and Exit Timing
150
Peripheral and Electrical Specifications
Copyright 2010–2012, Texas Instruments Incorporated
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Product Folder Links: TMS320F28069 TMS320F28068 TMS320F28067 TMS320F28066 TMS320F28065
TMS320F28064 TMS320F28063 TMS320F28062
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