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型号： TMDXCNCD28069ISO
厂商： Texas Instruments
文件页数： 149/174页
文件大小： 0K
描述： EVAL PICCOLO CONTROLCARD
标准包装： 1
系列： TMS320F2806x, Piccolo™, C2000™
主要目的： 接口，RS232，GPIO
嵌入式： 是，MCU，32 位
已用 IC / 零件： TMS320F2806x
已供物品： 板
TMS320F28069, TMS320F28068, TMS320F28067, TMS320F28066
TMS320F28065, TMS320F28064, TMS320F28063, TMS320F28062
SPRS698D – NOVEMBER 2010 – REVISED DECEMBER 2012
www.ti.com
Table 5-11. PIE MUXed Peripheral Interrupt Vector Table(1)
INTx.8
INTx.7
INTx.6
INTx.5
INTx.4
INTx.3
INTx.2
INTx.1
INT1.y
WAKEINT
TINT0
ADCINT9
XINT2
XINT1
Reserved
ADCINT2
ADCINT1
(LPM/WD)
(TIMER 0)
(ADC)
Ext. int. 2
Ext. int. 1
–
(ADC)
0xD4E
0xD4C
0xD4A
0xD48
0xD46
0xD44
0xD42
0xD40
INT2.y
EPWM8_TZINT
EPWM7_TZINT
EPWM6_TZINT
EPWM5_TZINT
EPWM4_TZINT
EPWM3_TZINT
EPWM2_TZINT
EPWM1_TZINT
(ePWM8)
(ePWM7)
(ePWM6)
(ePWM5)
(ePWM4)
(ePWM3)
(ePWM2)
(ePWM1)
0xD5E
0xD5C
0xD5A
0xD58
0xD56
0xD54
0xD52
0xD50
INT3.y
EPWM8_INT
EPWM7_INT
EPWM6_INT
EPWM5_INT
EPWM4_INT
EPWM3_INT
EPWM2_INT
EPWM1_INT
(ePWM8)
(ePWM7)
(ePWM6)
(ePWM5)
(ePWM4)
(ePWM3)
(ePWM2)
(ePWM1)
0xD6E
0xD6C
0xD6A
0xD68
0xD66
0xD64
0xD62
0xD60
INT4.y
HRCAP2_INT
HRCAP1_INT
Reserved
ECAP3_INT
ECAP2_INT
ECAP1_INT
(HRCAP2)
(HRCAP1)
–
(eCAP3)
(eCAP2)
(eCAP1)
0xD7E
0xD7C
0xD7A
0xD78
0xD76
0xD74
0xD72
0xD70
INT5.y
USB0_INT
Reserved
HRCAP4_INT
HRCAP3_INT
Reserved
EQEP2_INT
EQEP1_INT
(USB0)
–
(HRCAP4)
(HRCAP3)
–
(eQEP2)
(eQEP1)
0xD8E
0xD8C
0xD8A
0xD88
0xD86
0xD84
0xD82
0xD80
INT6.y
Reserved
MXINTA
MRINTA
SPITXINTB
SPIRXINTB
SPITXINTA
SPIRXINTA
–
(McBSP-A)
(SPI-B)
(SPI-A)
0xD9E
0xD9C
0xD9A
0xD98
0xD96
0xD94
0xD92
0xD90
INT7.y
Reserved
DINTCH6
DINTCH5
DINTCH4
DINTCH3
DINTCH2
DINTCH1
–
(DMA)
0xDAE
0xDAC
0xDAA
0xDA8
0xDA6
0xDA4
0xDA2
0xDA0
INT8.y
Reserved
I2CINT2A
I2CINT1A
–
(I2C-A)
0xDBE
0xDBC
0xDBA
0xDB8
0xDB6
0xDB4
0xDB2
0xDB0
INT9.y
Reserved
ECAN1_INTA
ECAN0_INTA
SCITXINTB
SCIRXINTB
SCITXINTA
SCIRXINTA
–
(CAN-A)
(SCI-B)
(SCI-A)
0xDCE
0xDCC
0xDCA
0xDC8
0xDC6
0xDC4
0xDC2
0xDC0
INT10.y
ADCINT8
ADCINT7
ADCINT6
ADCINT5
ADCINT4
ADCINT3
ADCINT2
ADCINT1
(ADC)
0xDDE
0xDDC
0xDDA
0xDD8
0xDD6
0xDD4
0xDD2
0xDD0
INT11.y
CLA1_INT8
CLA1_INT7
CLA1_INT6
CLA1_INT5
CLA1_INT4
CLA1_INT3
CLA1_INT2
CLA1_INT1
(CLA)
0xDEE
0xDEC
0xDEA
0xDE8
0xDE6
0xDE4
0xDE2
0xDE0
INT12.y
LUF
LVF
Reserved
XINT3
(CLA)
–
Ext. Int. 3
0xDFE
0xDFC
0xDFA
0xDF8
0xDF6
0xDF4
0xDF2
0xDF0
(1)
Out of 96 possible interrupts, some interrupts are not used. These interrupts are reserved for future devices. These interrupts can be
used as software interrupts if they are enabled at the PIEIFRx level, provided none of the interrupts within the group is being used by a
peripheral. Otherwise, interrupts coming in from peripherals may be lost by accidentally clearing their flag while modifying the PIEIFR.
To summarize, there are two safe cases when the reserved interrupts could be used as software interrupts:
No peripheral within the group is asserting interrupts.
No peripheral interrupts are assigned to the group (for example, PIE group 7).
76
Peripheral and Electrical Specifications
Copyright 2010–2012, Texas Instruments Incorporated
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Product Folder Links: TMS320F28069 TMS320F28068 TMS320F28067 TMS320F28066 TMS320F28065
TMS320F28064 TMS320F28063 TMS320F28062
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