参数资料
型号: XRT83SL34IV
厂商: Exar Corporation
文件页数: 78/80页
文件大小: 0K
描述: IC LIU T1/E1/J1 QUAD 128TQFP
标准包装: 72
类型: 线路接口装置(LIU)
驱动器/接收器数: 4/4
规程: T1,E1,J1
电源电压: 3.135 V ~ 3.465 V
安装类型: 表面贴装
封装/外壳: 128-LQFP
供应商设备封装: 128-TQFP(14x20)
包装: 托盘
XRT83SL34
QUAD T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. 1.0.0
5
RRING_0
RRING_1
RRING_2
RRING_3
10
22
81
93
I
Receiver Differential Ring Negative Input for Channel _0
Negative differential receive input from the line.
Receiver Differential Ring Negative Input for Channel _1
Receiver Differential Ring Negative Input for Channel _2
Receiver Differential Ring Negative Input for Channel _3
RXMUTE
RDY_DTACK
73
I
O
Receive Muting - Hardware mode
Connecting this pin ‘High’ will mute (force to ground) the outputs RPOS_n/
RNEG_n when a LOS condition occurs, to prevent data chattering. This pin
is internally pulled "low" consequently muting is normally disabled.
NOTES:
1.
Internally pulled "Low" with 50k
resistor.
2.
In Hardware mode, all receive channels share the same RXMUTE
control function.
Ready Output (Data Transfer Acknowledge Output) - Host mode
RXRES0
RXRES1
108
109
I
Receive External Resistor Control Pins - Hardware mode
Receive External Resistor Control Pin 0
Receive External Resistor Control Pin 1
These pins are used to determine the value of the external Receive fixed
resistor according to the following table:
NOTE: These pins are internally pulled “Low” with 50k
resistor.
RCLKE
PTS1
106
I
Receive Clock Edge - Hardware Mode
Set this pin "High" to sample RPOS_N/RNEG_n on the falling edge of
RCLK_n. With this pin tied "Low", output data are updated on the rising edge
of RCLK_n.
Microprocessor Type Select Input pin 1 - Host mode
This pin along with PTS2 (pin 107) is used to select the microprocessor
NOTE: This pin is internally pulled "Low" with a 50k
resistor.
SIGNAL NAME
PIN #TYPE
DESCRIPTION
R equired Fixed External
RX Resistor
No External Fixed R esistor
240
210
150
RXRES0
0
1
0
1
RXRES 1
0
1
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