参数资料
型号: XRT83SL34IV
厂商: Exar Corporation
文件页数: 58/80页
文件大小: 0K
描述: IC LIU T1/E1/J1 QUAD 128TQFP
标准包装: 72
类型: 线路接口装置(LIU)
驱动器/接收器数: 4/4
规程: T1,E1,J1
电源电压: 3.135 V ~ 3.465 V
安装类型: 表面贴装
封装/外壳: 128-LQFP
供应商设备封装: 128-TQFP(14x20)
包装: 托盘
XRT83SL34
QUAD T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. 1.0.0
58
TABLE 29: MICROPROCESSOR REGISTER #10, BIT DESCRIPTION
REGISTER ADDRESS
0001010
0011010
0101010
0111010
CHANNEL_n
CHANNEL_0
CHANNEL_1
CHANNEL_2
CHANNEL_3
FUNCTION
REGISTER
TYPE
RESET
VALUE
BIT #NAME
D7
Reserved
R/W
0
D6-D0
B6S3_n -
B0S3_n
Arbitrary Transmit Pulse Shape, Segment 3
The shape of each channel’s transmitted pulse can be made
independently user programmable by selecting “Arbitrary
Pulse” mode in
Table 5. The arbitrary pulse is divided into
eight time segments whose combined duration is equal to one
period of MCLK.
This 7 bit number represents the amplitude of the nth chan-
nel's arbitrary pulse during the third time segment. B6S3_n-
B0S3_n is in signed magnitude format with B6S3_n as the
sign bit and B0S3_n as the least significant bit (LSB).
R/W
0
TABLE 30: MICROPROCESSOR REGISTER #11, BIT DESCRIPTION
REGISTER ADDRESS
0001011
0011011
0101011
0111011
CHANNEL_n
CHANNEL_0
CHANNEL_1
CHANNEL_2
CHANNEL_3
FUNCTION
REGISTER
TYPE
RESET
VALUE
BIT #NAME
D7
Reserved
R/W
0
D6-D0
B6S4_n -
B0S4_n
Arbitrary Transmit Pulse Shape, Segment 4
The shape of each channel's transmitted pulse can be made
independently user programmable by selecting “Arbitrary
Pulse” mode in
Table 5. The arbitrary pulse is divided into
eight time segments whose combined duration is equal to one
period of MCLK.
This 7 bit number represents the amplitude of the nth chan-
nel's arbitrary pulse during the fourth time segment. B6S4_n-
B0S4_n is in signed magnitude format with B6S4_n as the
sign bit and B0S4_n as the least significant bit (LSB).
R/W
0
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