XRT83SL34IV (Exar) PDF资料下载 Datasheet(36/80 页)

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参数资料

型号：	XRT83SL34IV
厂商：	Exar Corporation
文件页数：	36/80页
文件大小：	0K
描述：	IC LIU T1/E1/J1 QUAD 128TQFP
标准包装：	72
类型：	线路接口装置（LIU）
驱动器/接收器数：	4/4
规程：	T1，E1，J1
电源电压：	3.135 V ~ 3.465 V
安装类型：	表面贴装
封装/外壳：	128-LQFP
供应商设备封装：	128-TQFP（14x20）
包装：	托盘

XRT83SL34

QUAD T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

REV. 1.0.0

LOCAL ANALOG LOOP-BACK (ALOOP)

With Local Analog Loop-Back activated, the transmit data at TTIP and TRING are looped-back to the analog

input of the receiver. External inputs at RTIP/RRING in this mode are ignored while valid transmit data

continues to be sent to the line. Local Analog Loop-Back exercises most of the functional blocks of the

XRT83SL34 including the jitter attenuator which can be selected in either the transmit or receive paths. Local

Analog Loop-Back is shown in Figure 18.

In this mode, the jitter attenuator (if selected) can be placed in the transmit or receive path.

REMOTE LOOP-BACK (RLOOP)

With Remote Loop-Back activated, receive data after the jitter attenuator (if selected in the receive path) is

looped back to the transmit path using RCLK as transmit timing. In this mode transmit clock and data are

ignored, while RCLK and receive data will continue to be available at their respective output pins. Remote

Loop-Back with jitter attenuator selected in the receive path is shown in Figure 19.

FIGURE 18. LOCAL ANALOG LOOP-BACK SIGNAL FLOW

FIGURE 19. REMOTE LOOP-BACK MODE WITH JITTER ATTENUATOR SELECTED IN RECEIVE PATH

Data &

Clock

Recovery

Decoder

TPOS

TNEG

TCLK

RCLK

RPOS

RNEG

Encoder

Timing

Control

TTIP

TRING

RTIP

RRING