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参数资料
| 型号： | 440EPX |
| 厂商： | Applied Micro Circuits Corp. |
| 英文描述： | PowerPC 440EPx Embedded Processor |
| 中文描述： | 嵌入式处理器的PowerPC 440EPx |
| 文件页数： | 6/94页 |
| 文件大小： | 738K |
| 代理商： | 440EPX |
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440EPx – PPC440EPx Embedded Processor
Preliminary Data Sheet
14
AMCC Proprietary
Revision 1.26 – October 15, 2007
PCI Power Management 1.1
PCI register set addressable both from on-chip processor and PCI device sides
Ability to boot from PCI bus memory
Error tracking/status
Supports initiation of transfers of the following types:
– Single beat I/O reads and writes
– Single beat and burst memory reads and writes
– Single beat configuration reads and writes (type 0 and type 1)
– Single beat special cycles
DDR2/1 SDRAM Memory Controller
The Double Data Rate 2/1 (DDR2/1) SDRAM memory controller supports industry standard discrete devices that
are compatible with both the DDR1 or DDR2 specifications. The correct I/O supply voltage must be provided for the
two types of DDR devices: DDR1 devices require +2.5 V and DDR2 devices require +1.8V.
Global memory timings, address and bank sizes, and memory addressing modes are programmable.
Features include:
32-bit memory interface for DDR1
32- or 64-bit memory interface for DDR2
Optional Error Checking and Correcting (ECC)
2.6-GB/s peak data rate
Two memory banks of up to 1 GB each
Maximum capacity of 2GB
Support for 128-Mb, 256-Mb, 512-Mb, and 1-Gb DDR devices, with CAS latencies of 2, 2.5, or 3
Clock frequencies from 133MHz (266Mbps) to 166MHz (333Mbps) supported
(Faster parts may be used, but must be clocked no faster than 166MHz)
Page mode accesses (up to 16 open pages) with configurable paging policy
Programmable address mapping and timing
Software initiated self-refresh
Power management (self-refresh, suspend, sleep)
One or two chip selects
External Peripheral Bus Controller (EBC)
Features include:
Up to six ROM, EPROM, SRAM, Flash memory, and slave peripheral I/O banks supported
Up to 83MHz operation
Burst and non-burst devices
32-bit byte-addressable data bus
Data parity
30-bit address
Peripheral Device pacing with external “Ready”
Latch data on Ready, synchronous or asynchronous
Programmable access timing per device
– 256 Wait States for non-burst
– 32 Burst Wait States for first access and up to 8 Wait States for subsequent accesses
– Programmable CSon, CSoff relative to address
– Programmable OEon, WEon, WEoff (1 to 4 clock cycles) relative to CS
Programmable address mapping
External DMA Slave Support
相关PDF资料 |
PDF描述 |
|---|---|
| 440EP | Power PC 440EP Embedded Processor |
| 440GP | Power PC 440GP Embedded Processor |
| 440GRX | PowerPC 440GRx Embedded Processor |
| 440GR | Power PC 440GR Embedded Processor |
| 440GX | Power PC 440GX Embedded Processor |
相关代理商/技术参数 |
参数描述 |
|---|---|
| 440ES001B1434-4 | 功能描述:环形MIL规格后盖 CRIMIP RING ADPTR DC STRAIGHT RoHS:否 制造商:Amphenol PCD MIL 类型:MIL-DTL-38999 III, IV 系列:AS85049 产品类型:Environmental EMI/RFI Backshells 外壳类型:Straight 外壳大小:18 外壳材质:Aluminum Alloy |
| 440ES031M1633-3B | 功能描述:环形MIL规格后盖 BND/SHRNK BOOT ADPTR DC STRAIGHT BAND RoHS:否 制造商:Amphenol PCD MIL 类型:MIL-DTL-38999 III, IV 系列:AS85049 产品类型:Environmental EMI/RFI Backshells 外壳类型:Straight 外壳大小:18 外壳材质:Aluminum Alloy |
| 440ES031M2003-3B | 功能描述:环形MIL规格后盖 BND/SHRNK BOOT ADPTR DC STRAIGHT BAND RoHS:否 制造商:Amphenol PCD MIL 类型:MIL-DTL-38999 III, IV 系列:AS85049 产品类型:Environmental EMI/RFI Backshells 外壳类型:Straight 外壳大小:18 外壳材质:Aluminum Alloy |
| 440FA002NF1002-N | 功能描述:环形MIL规格后盖 RoHS:否 制造商:Amphenol PCD MIL 类型:MIL-DTL-38999 III, IV 系列:AS85049 产品类型:Environmental EMI/RFI Backshells 外壳类型:Straight 外壳大小:18 外壳材质:Aluminum Alloy |
| 440FA002NF1006-N | 功能描述:环形MIL规格后盖 RoHS:否 制造商:Amphenol PCD MIL 类型:MIL-DTL-38999 III, IV 系列:AS85049 产品类型:Environmental EMI/RFI Backshells 外壳类型:Straight 外壳大小:18 外壳材质:Aluminum Alloy |
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