参数资料
型号: 403GC-3BA40C1
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 40 MHz, RISC PROCESSOR, PBGA160
封装: PLASTIC, BGA-160
文件页数: 16/48页
文件大小: 768K
代理商: 403GC-3BA40C1
IBM PowerPC 403GC
23
SysClk Timing
Notes:
1. These values do not include the allowable tolerance for clock edge instability represented by TCS.
2. Cycle-to-cycle jitter allowed between any two edges.
3. Rise and fall times measured between 0.8V and 2.0V.
Timer Clock and Serial Port Timing Characteristics
Notes:
1. Maximum input frequency of TimerClk and SerClk must be less than or equal to half of SysClk input frequency.
2. TimerClk and SerClk input high times must be greater than or equal to SysClk period TC.
3. TimerClk and SerClk input low times must also be greater than or equal to SysClk period TC.
Table 12. 403GC System Clock Timing
Symbol
Parameter
25 MHz
33 MHz
40 MHz
Units
Min
Max
Min
Max
Min
Max
FC
SysClk clock input frequency1
25
33
40
MHz
TC
SysClk clock period1
40
30
25
ns
TCS
Clock edge stability2
0.2
ns
TCH
Clock input high time
16
13
11
ns
TCL
Clock input low time
16
13
11
ns
TCR
Clock input rise time3
0.5
2.5
0.5
2.5
0.5
1.5
ns
TCF
Clock input fall time3
0.5
2.5
0.5
2.5
0.5
1.5
ns
Table 13. 403GC Timer Clock and Serial Clock Timings
Symbol
Parameter
Min
Max
Units
FSC
TimerClk, SerClk input frequency
0.5 FC
MHz
TSC
TimerClk, SerClk period
2TC
ns
TSCH
TimerClk, SerClk input high time
1/FC
ns
TSCL
TimerClk, SerClk input low time
1/FC
ns
TCR
TCF
TCL
TCH
TC
2.0V
1.5V
0.8V
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