参数资料
型号: 25AA1024T-I/MF
厂商: Microchip Technology
文件页数: 7/34页
文件大小: 0K
描述: IC EEPROM 1MBIT 20MHZ 8DFN
标准包装: 3,300
格式 - 存储器: EEPROMs - 串行
存储器类型: EEPROM
存储容量: 1M (128K x 8)
速度: 20MHz
接口: SPI 3 线串行
电源电压: 1.8 V ~ 5.5 V
工作温度: -40°C ~ 85°C
封装/外壳: 8-VDFN 裸露焊盘
供应商设备封装: 8-DFN-S(6x5)
包装: 带卷 (TR)
其它名称: 25AA1024T-I/MFTR
25AA1024
2.0
FUNCTIONAL DESCRIPTION
BLOCK DIAGRAM
2.1
Principles of Operation
STATUS
Register
HV Generator
The 25AA1024 is a 131,072 byte Serial EEPROM
designed to interface directly with the Serial Peripheral
Interface (SPI) port of many of today’s popular
microcontroller families, including Microchip’s PIC ?
microcontrollers. It may also interface with microcon-
trollers that do not have a built-in SPI port by using
discrete I/O lines programmed properly in firmware to
I/O Control
Logic
Memory
Control
Logic
X
Dec
EEPROM
Array
match the SPI protocol.
The 25AA1024 contains an 8-bit instruction register.
The device is accessed via the SI pin, with data being
clocked in on the rising edge of SCK. The CS pin must
SI
Page Latches
be low and the HOLD pin must be high for the entire
operation.
Table 2-1 contains a list of the possible instruction
bytes and format for device operation. All instructions,
addresses and data are transferred MSB first, LSB last.
Data (SI) is sampled on the first rising edge of SCK
after CS goes low. If the clock line is shared with other
peripheral devices on the SPI bus, the user can assert
the HOLD input and place the 25AA1024 in ‘HOLD’
mode. After releasing the HOLD pin, operation will
resume from the point when the HOLD was asserted.
TABLE 2-1:
INSTRUCTION SET
SO
CS
SCK
HOLD
WP
V CC
V SS
Y Decoder
Sense Amp.
R/W Control
Instruction Name
READ
WRITE
WREN
WRDI
RDSR
WRSR
PE
SE
CE
RDID
DPD
Instruction Format
0000 0011
0000 0010
0000 0110
0000 0100
0000 0101
0000 0001
0100 0010
1101 1000
1100 0111
1010 1011
1011 1001
Description
Read data from memory array beginning at selected address
Write data to memory array beginning at selected address
Set the write enable latch (enable write operations)
Reset the write enable latch (disable write operations)
Read STATUS register
Write STATUS register
Page Erase – erase one page in memory array
Sector Erase – erase one sector in memory array
Chip Erase – erase all sectors in memory array
Release from Deep power-down and read electronic signature
Deep Power-Down mode
? 2010 Microchip Technology Inc.
DS21836H-page 7
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