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参数资料
| 型号： | 25AA1024T-I/MF |
| 厂商： | Microchip Technology |
| 文件页数： | 19/34页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 1MBIT 20MHZ 8DFN |
| 标准包装： | 3,300 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 1M (128K x 8) |
| 速度： | 20MHz |
| 接口： | SPI 3 线串行 |
| 电源电压： | 1.8 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-VDFN 裸露焊盘 |
| 供应商设备封装： | 8-DFN-S（6x5） |
| 包装： | 带卷 (TR) |
| 其它名称： | 25AA1024T-I/MFTR |
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25AA1024
2.12
RELEASE FROM DEEP POWER-
DOWN AND READ ELECTRONIC
SIGNATURE
Release from Deep Power-Down mode and Read
Electronic Signature is entered by driving CS low,
followed by the RDID instruction code (Figure 2-12)
and then a dummy address of 24 bits (A23-A0). After
Once the device has entered Deep Power-Down
mode all instructions are ignored except the release
from Deep Power-down and Read Electronic Signa-
ture command. This command can also be used when
the device is not in Deep Power-down, to read the
electronic signature out on the SO pin unless another
command is being executed such as Erase, Program
or Write STATUS register.
the last bit of the dummy address is clocked in, the
8-bit Electronic signature is clocked out on the SO
pin.
After the signature has been read out at least once,
the sequence can be terminated by driving CS high.
The device will then return to Standby mode and will
wait to be selected so it can be given new instructions.
If additional clock cycles are sent after the electronic
signature has been read once, it will continue to output
the signature on the SO line until the sequence is
terminated.
FIGURE 2-12:
CS
RELEASE FROM DEEP POWER-DOWN AND READ ELECTRONIC SIGNATURE
0
1
2
3
4
5
6
7
8
9 1 0 11
2 9 3 0 3 1 3 2 3 3 3 4 3 5 3 6 3 7 3 8 3 9
SCK
Instruction
24-bit Address
SI
1
0
1
0
1
0
1
1 23 22 21 20
2
1
0
High-Impedance
Electronic Signature Out
SO
7
0
6
0
5
1
4
0
3
1
2
0
1
0
0
1
Manufacturers ID 0x29
Driving CS high after the 8-bit RDID command, but before the Electronic Signature has been transmitted, will still
ensure the device will be taken out of Deep Power-Down mode. However, there is a delay T REL that occurs before the
device returns to Standby mode (I CCS ), as shown in Figure 2-13.
FIGURE 2-13:
CS
RELEASE FROM DEEP POWER-DOWN AND READ ELECTRONIC SIGNATURE
0
1
2
3
4
5
6
7
T REL
SCK
Instruction
SI
1
0
1
0
1
0
1
1
High-Impedance
SO
? 2010 Microchip Technology Inc.
DS21836H-page 19
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