参数资料
型号: XCV405E-8FG676C
厂商: Xilinx Inc
文件页数: 35/118页
文件大小: 0K
描述: IC FPGA 1.8V C-TEMP 676-FBGA
产品变化通告: FPGA Family Discontinuation 18/Apr/2011
标准包装: 1
系列: Virtex®-E EM
LAB/CLB数: 2400
逻辑元件/单元数: 10800
RAM 位总计: 573440
输入/输出数: 404
门数: 129600
电源电压: 1.71 V ~ 1.89 V
安装类型: 表面贴装
工作温度: 0°C ~ 85°C
封装/外壳: 676-BGA
供应商设备封装: 676-FBGA(27x27)
Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
DS025-2 (v3.0) March 21, 2014
Module 2 of 4
19
R
— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —
mits the internal storage elements to begin changing state
in response to the logic and the user clock.
The relative timing of these events can be changed. In addi-
tion, the GTS, GSR, and GWE events can be made depen-
dent on the DONE pins of multiple devices all going High,
forcing the devices to start synchronously. The sequence
can also be paused at any stage until lock has been
achieved on any or all DLLs.
Readback
The configuration data stored in the Virtex-E configuration
memory can be readback for verification. Along with the
configuration data it is possible to readback the contents all
flip-flops/latches, LUT RAMs, and block RAMs. This capa-
bility is used for real-time debugging. For more detailed
information, see application note XAPP138 “Virtex FPGA
Series Configuration and Readback”.
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参数描述
XCV405E-8FG676I 制造商:XILINX 制造商全称:XILINX 功能描述:Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
XCV405E-8FG900C 制造商:XILINX 制造商全称:XILINX 功能描述:Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
XCV405E-8FG900I 制造商:XILINX 制造商全称:XILINX 功能描述:Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
XCV50 制造商:XILINX 制造商全称:XILINX 功能描述:Field Programmable Gate Arrays
XCV50-4BG256C 功能描述:IC FPGA 2.5V C-TEMP 256-PBGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA(现场可编程门阵列) 系列:Virtex® 标准包装:1 系列:Kintex-7 LAB/CLB数:25475 逻辑元件/单元数:326080 RAM 位总计:16404480 输入/输出数:350 门数:- 电源电压:0.97 V ~ 1.03 V 安装类型:表面贴装 工作温度:0°C ~ 85°C 封装/外壳:900-BBGA,FCBGA 供应商设备封装:900-FCBGA(31x31) 其它名称:122-1789