参数资料
型号: VNC1L-1A
厂商: Future Technology Devices International Ltd
元件分类: 总线控制器
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP48
封装: 7 X 7 MM, 0.50 MM PITCH, GREEN, LQFP-48
文件页数: 11/32页
文件大小: 672K
代理商: VNC1L-1A
Copyright 2009 Future Technology Devices International Limited
19
Document Reference No.: FT_000030
Vinculum VNC1L Embedded USB Host Controller IC Datasheet Version 2.02
Clearance No.: FTDI# 50
Figure 5.5 SPI Slave Mode Data Write
5.2.4 SPI Master Status Read Transaction
The VNC1L has a status byte which determines the state of the Receive and Transmit Buffers. The SPI
master must poll VNC1L and read the status byte.
The Start and Setup sequence is sent to VNC1L by the SPI master, see Figure 5.6. The VNC1L clocks out
its status byte on subsequent rising edge clock cycles from the SPI master. This is followed by a status
bit generated by VNC1L (also on the SDO) which will always be zero (indicating new data).
The meaning of the bits within the status byte sent by VNC1L during a Status Read operation is described
The result of the Status Read transaction is only valid during the transaction itself.
Data read and data write transactions must still check the status bit during a Data Read or Data Write
cycle regardless of the result of a Status Read operation.
Bit
Description
0
RXF#
Receive Buffer Full
1
TXE#
Transmit Buffer Empty
2
-
3
-
4
RXF IRQEn
Receive Buffer Full Interrupt Enable
5
TXE IRQEn
Transmit Buffer Empty Interrupt Enable
6
-
7
-
Table 5.8 SPI Status Read Byte – bit descriptions.
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