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| 型号： | IRDCIP1201-A |
| 厂商： | International Rectifier |
| 文件页数： | 21/29页 |
| 文件大小： | 0K |
| 描述： | BUCK CONV REF DESIGN KIT IP1201 |
| 标准包装： | 1 |
| 系列： | iPOWIR™ |
| 主要目的： | DC/DC，步降 |
| 输出及类型： | 2，非隔离 |
| 输出电压： | 1.5V，2.5V |
| 电流 - 输出： | 15A，15A |
| 输入电压： | 3.14 ~ 5.5 V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 300kHz |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | iP1201 |
| 相关产品： | IP1201TRPBF-ND - IC REG BUCK SYNC ADJ 30A 198BGA IP1201PBF-ND - IC REG BUCK SYNC ADJ 30A 198BGA IP1201TR-ND - IC REG BUCK SYNC ADJ 30A 198BGA IP1201-ND - IC REG BUCK SYNC ADJ 30A 198BGA |
| 其它名称： | *IRDCIP1201-A |
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iP1201
Select C22 such that C 22 <<
2.SelectR 26 =~10k?
3. Place the first zero f z1 at 75% of the resonant fre-
quency f LC of the output filter.
Determine C 9 from equation (20).
4. Place a third pole f P3 at or near the switching fre-
quency f SW .
C 9
10
5. Calculate C 21 from equation (22).
the total amount of capacitance seen by both chan-
nels and the inductance of the voltage controlling chan-
nel should be considered for compensation.
Current Loop
Use the following procedure for current loop compen-
sation:
In Fig. 22, L 1 and L 2 are the inductors for outputs 1 and
2 respectively. Rsh1 and Rsh2 are the current sensing
shunts for the same outputs.
Vsw1
L1
6. Place the second zero at 125% of the resonant fre-
quency f LC of the output filter. Calculate R 9 using equa-
tion (21).
iP1201
E/A2
Vp-Ref
R sh1
VOUT
7. Place the second pole f p2 at or near f esr of the output
capacitor C o and determine the value of R 25 from equa-
R 9
tion (18). Make sure R 25 <
10
FB2
CC2
C11
R6
R sh2
L2
Vsw2
R Load
R 7 = R 9 ×
8.Useequation(23)tocalculateR 7 .
V ref
V 0 ? V ref
(23)
Fig. 22: Output 2 error amplifier compensation net-
work for parallel configuration.
Resistor R 6 of the compensation network is calculated
according to equation (24)
1 2 π × L 2 × f 02
R eq
f p =
Morethanoneiterationmayberequiredtocalculate
the values of the compensation components if cross-
over frequencies higher than the range specified in
step 1 are required (for higher bandwidths and faster
transient response performance). To ensure stabil-
ity a phase margin greater than 45° should be
achieved.
Refer to AN-1043 for more detailed compensation tech-
niques using Transconductance Amplifiers.
Compensation in Current Share Mode
The iP1201 can be configured in single output paral-
leled configuration. The feedback loop of the first out-
put is closed around the output voltage, and the sec-
ond amplifier, which is also a transconductance one,
forces equal sharing of the inductor currents in both
outputs.
R 6 = V ramp × × (24)
g m × R sh 1 V in
The power stage of the current loop has a dominant
pole at frequency expressed by equation (25):
(25)
2 ? π ? L 2
where, R eq represents the total resistance of the power
stage that includes the Rdson of the FET switches,
the DC resistance of the inductor and the shunt resis-
tance, and is expressed by equation (26):
R eq = R dson + R L + R sh (26)
use 10mohm for FET Rdson.
To calculate for C11, place the zero frequency f z at
10 times the dominant pole frequency f p using equa-
tion (27):
C 11 =
VoltageLoop
Type II and Type III methods of voltage loop compen-
sation discussed above, can be used to compensate
the voltage loop of a single output iP1201. In this case,
www.irf.com
f z = 10 × f p
1
2 π × R 6 × f z
Select C 11 ≤ 6 . 8 nf
(27)
21
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