参数资料
型号: FAN5236MTCX
厂商: Fairchild Semiconductor
文件页数: 14/19页
文件大小: 0K
描述: IC CTLR DDR/PWM DUAL HE 28TSSOP
产品变化通告: Mold Compound Change 30/Nov/2007
标准包装: 1
应用: 控制器,移动式 DDR
输入电压: 5 V ~ 24 V
输出数: 2
输出电压: 0.9 V ~ 5 V
工作温度: -10°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 28-TSSOP
包装: 标准包装
产品目录页面: 1221 (CN2011-ZH PDF)
其它名称: FAN5236MTCXDKR
Conditional stability may occur only when the main load
pole is positioned too much to the left side on the
frequency axis due to excessive output filter
capacitance. In this case, the ESR zero placed within
the 10kHz to 50kHz range gives some additional phase
boost. There is an opposite trend in mobile applications
to keep the output capacitor as small as possible.
If a larger inductor value or low-ESR values are
required by the application, additional phase margin can
be achieved by putting a zero at the LC crossover
frequency. This can be achieved with a capacitor across
the feedback resistor (e.g. R5 from Figure 6), as shown
in Figure 15.
regulator. If ILIM det does not occur between cycles
nine and sixteen, normal operation is restored and the
over-current circuit resets itself.
L(OUT)
V OUT
VSEN
R5
R6
C(Z)
C(OUT)
Figure 16.
Over-Current Protection Waveforms
Figure 15.
Improving Phase Margin
Over-Voltage / Under-Voltage Protection
The optimal value of C(Z) is:
Should the V SNS voltage exceed 120% of V REF (0.9V)
due to an upper MOSFET failure or for other reasons,
C(Z) =
L(OUT) × C(OUT)
R
(11)
the over-voltage protection comparator forces LDRV
HIGH. This action actively pulls down the output voltage
and, in the event of the upper MOSFET failure,
Protections
The converter output is monitored and protected
against extreme overload, short-circuit, over-voltage,
and under-voltage conditions.
A sustained overload on an output sets the PGx pin
LOW and latches off the regulator on which the fault
occurs. Operation can be restored by cycling the V CC
voltage or by toggling the EN pin.
If V OUT drops below the under-voltage threshold, the
regulator shuts down immediately.
Over-Current Sensing
If the circuit’s current limit signal (“ILIM det” in Figure
12) is HIGH at the beginning of a clock cycle, a pulse-
skipping circuit is activated and HDRV is inhibited. The
circuit continues to pulse skip in this manner for the
next eight clock cycles. If at any time from the ninth to
the sixteenth clock cycle, the ILIM det is again reached,
the over-current protection latch is set, disabling the
? 2002 Fairchild Semiconductor Corporation
FAN5236 ? Rev. 1.3.2
14
eventually blows the battery fuse. As soon as the output
voltage drops below the threshold, the OVP comparator
is disengaged.
This OVP scheme provides a ”soft” crowbar function,
which accommodates severe load transients and does
not invert the output voltage when activated — a
common problem for latched OVP schemes.
Similarly, if an output short-circuit or severe load
transient causes the output to drop to less than 75% of
the regulation set point, the regulator shuts down.
Over-Temperature Protection
The chip incorporates an over-temperature protection
circuit that shuts the chip down if a die temperature of
about 150°C is reached. Normal operation is restored at
die temperature below 125°C with internal power-on
reset asserted, resulting in a full soft-start cycle.
www.fairchildsemi.com
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