参数资料
| 型号： | XRT83SL216IB |
| 厂商： | Exar Corporation |
| 文件页数： | 9/42页 |
| 文件大小： | 0K |
| 描述： | IC LIU SH E1 16CH 289STBGA |
| 标准包装： | 84 |
| 类型： | 线路接口装置（LIU） |
| 驱动器/接收器数： | 16/16 |
| 规程： | T1，E1，J1 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 289-LFBGA |
| 供应商设备封装： | 289-STBGA（15x15） |
| 包装： | 托盘 |
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XRT83SL216
15
REV. 1.0.0
16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
1.0
RECEIVE PATH LINE INTERFACE
The receive path consists of 16 independent E1 receivers. The following section describes the complete
receive path from RTIP/RRING inputs to RCLK/RPOS/RNEG outputs. A simplified block diagram of the receive
path is shown in Figure 3.
1.1
Peak Detector/Data Slicer
In the receive path, the line signal is coupled into the RTIP and RRing pins via a 2:1 transformer and are
converted into digital pulses by an equalizer and an adaptive data slicer. Clock and data signals are recovered
from the output of the slicer with the help of a digital PLL that provides excellent jitter accommodation for high
input jitter tolerance.
1.2
Clock and Data Recovery
The receive clock (RCLK) is recovered by the clock and data recovery circuitry. An internal PLL locks on the
incoming data stream and outputs a clock that’s in phase with the incoming signal. In the absence of an
incoming signal, RCLK maintains its timing by using MCLK as its reference. The recovered data can be
updated on either edge of RCLK. By default, data is updated on the rising edge of RCLK. To update data on
the falling edge of RCLK, set RCLKinv to "1" in the appropriate global register. Figure 4 is a timing diagram of
the receive data updated on the rising edge of RCLK. Figure 5 is a timing diagram of the receive data updated
on the falling edge of RCLK. The timing specifications are shown in Table 1.
FIGURE 3. SIMPLIFIED BLOCK DIAGRAM OF THE RECEIVE PATH LINE TERMINATION (RTIP/RRING)
FIGURE 4. RECEIVE DATA UPDATED ON THE RISING EDGE OF RCLK
FIGURE 5. RECEIVE DATA UPDATED ON THE FALLING EDGE OF RCLK
HDB3
Decoder
Rx Jitter
Attenuator
Clock & Data
Recovery
Rx Equalizer &
Peak Detector
RTIP
RRING
RCLK
RPOS
RNEG
RCL K
RP O S
or
RNE G
R
DY
RCL K
R
RCL K
F
R
OH
RCLK
RPOS
or
RNEG
R
DY
RCLK
F
RCLK
R
OH
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相关代理商/技术参数 |
参数描述 |
|---|---|
| XRT83SL216IB-F | 功能描述:接口 - 专用 RoHS:否 制造商:Texas Instruments 产品类型:1080p60 Image Sensor Receiver 工作电源电压:1.8 V 电源电流:89 mA 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:BGA-59 |
| XRT83SL28 | 制造商:EXAR 制造商全称:EXAR 功能描述:8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT |
| XRT83SL28ES | 功能描述:外围驱动器与原件 - PCI 8 CH E1 LIU SH RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
| XRT83SL28IV | 功能描述:接口 - 专用 . . RoHS:否 制造商:Texas Instruments 产品类型:1080p60 Image Sensor Receiver 工作电源电压:1.8 V 电源电流:89 mA 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:BGA-59 |
| XRT83SL28IV-F | 功能描述:外围驱动器与原件 - PCI RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
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