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参数资料
| 型号： | MC13783VKR2 |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 44/50页 |
| 文件大小： | 0K |
| 描述： | IC PWR MNGMNT ATLAS 3G 247MAPBGA |
| 标准包装： | 1,500 |
| 应用： | 手持/移动设备 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 247-TFBGA |
| 供应商设备封装： | 247-MAPBGA（10x10） |
| 包装： | 带卷 (TR) |
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Functional Description
Table 26. USB Mode Selection
USB Mode
Mode Selection
DATSE0 BIDIR
Mode Description
UTXENB = Low UTXENB = High
Corresponding
UMOD0/UMOD1 Setting
unidirectional
(6-wire)
bidirectional
(4-wire)
unidirectional
(6-wire)
0
1
0
1
0
UDATVP → UDP
USE0VM → UDM
UDATVP → UDP
USE0VM → UDM
UDATVP → UDP/UDM
USE0VM → FSE0 1
UDP → URXVP
UDM → URXVM UDP/UDM
→ URCVD
UDP → UDATVP
UDM → USE0VM UDP/UDM
→ URCVD
UDP → URXVP
UDM → URXVM UDP/UDM
→ URCVD
Don’t Care /
To VATLAS
To VATLAS /
To Ground
To Ground /
To Ground
bidirectional
(3-wire)
1
UDATVP → UDP/UDM UDP/UDM → UDATVP (active)
USE0VM → FSE0 UDP → UDATVP (suspend)
RSE0 → USE0VM
Open /
To Ground
1
FSE0 stands for forced SE0, RSE0 stands for received SE0.
4.5.1.1.4
Full Speed/ Low Speed Configuration
The USB transceiver supports the low speed mode of 1.5 Mbits/second and the full speed mode of 12
Mbits/second. To indicate the speed to the host an internal 1.5 kOhm pull up to VUSB is used. Via SPI this
resistor can be connected to UDP to indicate full speed, or to UDM to indicate low speed.
4.5.1.1.5
USB Suspend
USB suspend mode is enabled through SPI. When set, the USB transceiver enters a low power mode which
reduces the transceiver current drain to below 500 μ A. In USB suspend mode, the VUSB regulator remains
enabled and the VBUS detect comparators remain enabled, while the single ended receivers are switched
from a comparator to a Schmitt-trigger buffer.
4.5.1.1.6
USB On-The-Go
USBOTG support circuitry is added in order to allow a phone to act as a dual-role USBOTG device. In
accordance with USBOTG requirements, the pull down resistors on UDP and UDM can be switched in or
out individually via SPI. Furthermore, the pulls down resistors are integrated on-chip.
The USBOTG specification requires that during the session request protocol, the D+ (full speed) line is
pulled up for a duration of 5 to 10 msec. In order to reduce the SPI traffic, the MC13783 has an integrated
timer used for this task.
To support VBUS pulsing, there is a programmable current limit and timer on the VBUS regulator. During
VBUS pulsing, the lower current limit allows for easier detection of a legacy host device on the far end of
the USB cable.
It is possible to have the transceiver automatically connect the data pull-up to VUSB any time a SE0 is
detected. This enables the phone to meet the USBOTG timing requirements without unduly taxing the
software.
MC13783 Technical Data, Rev. 3.5
44
Freescale Semiconductor
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