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参数资料
| 型号： | MC13783VKR2 |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 42/50页 |
| 文件大小： | 0K |
| 描述： | IC PWR MNGMNT ATLAS 3G 247MAPBGA |
| 标准包装： | 1,500 |
| 应用： | 手持/移动设备 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 247-TFBGA |
| 供应商设备封装： | 247-MAPBGA（10x10） |
| 包装： | 带卷 (TR) |
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Functional Description
4.4.2.7
ADC Arbitration
The ADC converter and its control is based on a single ADC converter core. Since the data path is 24 bits
wide, results for 2 conversion results (10 bits each) can be read back in each SPI read sequence. For support
of queued conversion requests, the SPI has the ability to write to the two sets of ADC control, namely “its
own” ADC and “the other” ADC or ADC BIS.
The write access to the control of ADC BIS is handled via the ADCBISn bits located at bit position 23 of
the ADC control registers. By setting this bit to a 1, the control bits which follow are directed to the ADC
BIS. ADCBISn will always read back 0 and there is no read access to the ADCBIS control bits. The read
results from the ADC conversions are available in two separate registers ADC result registers ADC0 and
ADC1.
4.5
Miscellaneous Functions
Miscellaneous functions are described in the following sections:
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4.5.1
Connectivity
This section summarizes the following interface information:
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4.5.1.1
4.5.1.1.1
USB Interface
Supplies
The USB interface is supplied by the VUSB (3.3 V) and the VBUS (5.0 V) regulators. The VBUS regulator
takes the boost supply and regulates it down to the required USBOTG level which is provided to VBUS in
the case of a USBOTG connection. The transceiver itself is supplied from VUSB. The VUSB regulator by
default is supplied by BP and by SPI programming can be boost or VBUS supplied as well.
4.5.1.1.2
Detect
Comparators are used to detect a valid VBUS, and to support the USB OTG session request protocol.
4.5.1.1.3
Transceiver
The USB transceiver data flow is depicted in below diagram. The processor interface IO level is set to
USBVCC.
MC13783 Technical Data, Rev. 3.5
42
Freescale Semiconductor
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