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参数资料
| 型号： | A3998SETTR-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 7/20页 |
| 文件大小： | 0K |
| 描述： | IC MOTOR DRIVER DUAL DMOS QFN |
| 标准包装： | 1 |
| 应用： | 直流电机驱动器，PWM 电机驱动器，步进电机驱动器 |
| 输出数： | 1 或 2 |
| 电流 - 输出： | ±1.5A |
| 电压 - 负载： | 9 V ~ 50 V |
| 电源电压： | 3 V ~ 5.5 V |
| 工作温度： | -20°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 供应商设备封装： | 32-QFN |
| 包装： | 标准包装 |
| 其它名称： | 620-1459-6 |
A3998
Dual DMOS Full Bridge Motor Driver
With Serial Port Control and Dual Regulators
Functional Description
Voltage Regulators
Switching Regulator
An adjustable fixed off-time, peak current controlled buck
regulator is used to provide external voltage to microprocessors
or DSPs. The switcher output is fed back into the device and
provides low voltage logic supply for the IC, improving overall
efficiency. The regulator can operate in both continuous and
discontinuous modes. An internal blanking circuit filters out tran-
sients due to the reverse recovery of the external clamp diode.
The switching regulator fixed off-time of approximately 4 μ s is
appropriate for the V OUT1 range from 3.3 to 5 V.
Light Load Regulation The switching regulator enters Cycle
Skipping mode at light load conditions to maintain reasonable
voltage regulation. As the output current decreases, there remains
some energy that is stored during the power switch minimum
on-time. The stored energy is transferred to the output capaci-
tor and the output voltage begins to increase. To prevent energy
in the inductor from pumping the supply voltage up, the A3998
can skip PWM cycles. Cycle skipping mode can be activated any
time there is discontinuous current in the inductor.
Soft Start An internal ramp generator and counter allow the out-
put to ramp-up slowly. This limits the maximum demand on the
external power supply by controlling the inrush current required
to charge the external capacitor and any DC load at start-up.
Internally, the ramp is set to 10 ms nominal rise time.
Shorted Load The regulator incorporates an overcurrent limit
to handle shorted load conditions at the regulator output. For
low output voltages at power-up, and in the case of a short, the
off-time is extended to prevent loss of control of the current limit
due to the minimum on-time of the switcher.
The overcurrent limit has a foldback feature to reduce the current
limit when the output is overloaded (see figure 2). The voltage at
the feedback pin (FB) is monitored to determine which current
limit level to use. As the feedback voltage rises above approxi-
mately 400 mV, the foldback circuit is disabled.
L1
VBB
SW1
D1
ES R
VOUT1
VCP
V BB UVLO
TSD
Monitor
ENABLE
Switch PWM
Control
VCP
FB1
R1
R2
COUT1
220 μ F/35 V
Clamp
Ipeak
+
-
Error
-
Idemand
Comp
ENABLE
GATE REG
OR
Internal
Oscillator
Clock
Counter
Soft Start
Ramp Generation
1V
Figure 1. Implementation of switcher circuit; see table 3 for external component specifications.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
7
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相关代理商/技术参数 |
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|---|---|
| A399B | 制造商:Powerex Power Semiconductors 功能描述:DIODE FAST 400A 200V DO-200AA |
| A399D | 制造商:Powerex Power Semiconductors 功能描述:DIODE FAST 400A 400V DO-200AA |
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| A399E | 制造商:n/a 功能描述:Power Semiconductor |
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