参数资料
型号: 950812CGLF
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟产生/分配
英文描述: 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
封装: 6.10 MM, 0.50 MM PITCH, GREEN, MO-153, TSSOP-56
文件页数: 12/31页
文件大小: 285K
代理商: 950812CGLF
2
ICS950812
0542H—04/08/05
Pin Configuration
PIN # PIN NAME
PIN TYPE
DESCRIPTION
1
VDDREF
PWR
Ref, XTAL power supply, nominal 3.3V
2
X1
IN
Crystal input, Nominally 14.318MHz.
3
X2
OUT
Crystal output, Nominally 14.318MHz
4
GND
PWR
Ground pin.
5
PCICLK_F0
OUT
Free running PCI clock not affected by PCI_STOP# .
6
PCICLK_F1
OUT
Free running PCI clock not affected by PCI_STOP# .
7
PCICLK_F2
OUT
Free running PCI clock not affected by PCI_STOP# .
8
VDDPCI
PWR
Power supply for PCI clocks, nominal 3.3V
9
GND
PWR
Ground pin.
10
PCICLK0
OUT
PCI clock output.
11
**E_PCICLK1/PCICLK1
I/O
Early/Normal PCI clock output latched at power up.
12
PCICLK2
OUT
PCI clock output.
13
**E_PCICLK3/PCICLK3
I/O
Early/Normal PCI clock output latched at power up.
14
VDDPCI
PWR
Power supply for PCI clocks, nominal 3.3V
15
GND
PWR
Ground pin.
16
PCICLK4
OUT
PCI clock output.
17
PCICLK5
OUT
PCI clock output.
18
PCICLK6
OUT
PCI clock output.
19
VDD3V66
PWR
Power pin for the 3V66 clocks.
20
GND
PWR
Ground pin.
21
66MHZ_OUT0/3V66_2
OUT
3.3V 66.66MHz clock output selected via buffered or internal VCO.
22
66MHZ_OUT1/3V66_3
OUT
3.3V 66.66MHz clock output selected via buffered or internal VCO.
23
66MHZ_OUT2/3V66_4
OUT
3.3V 66.66MHz clock output selected via buffered or internal VCO.
24
66MHZ_IN/3V66_5
I/O
3.3V 66.66MHz clock from internal VCO, 66MHZ input to 66MHz output and
PCI.
25
*PD#
IN
Asynchronous active low input pin used to power down the device into a low
power state. The internal clocks are disabled and the VCO and the crystal
are stopped. The latency of the power down will not be greater than 1.8ms.
26
VDDA
PWR
3.3V power for the PLL core.
27
GND
PWR
Ground pin.
28
Vtt_PWRGD#
IN
This 3.3V LVTTL input is a level sensitive strobe used to determine when
latch inputs are valid and are ready to be sampled. This is an active low
input.
相关PDF资料
PDF描述
08056C103JAT4A General Specifications
950812YGLFT 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
950812YGT 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
950902DGLFT 200.4 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
08056C103JAT7A Separating plate, width: 0.8 mm, color: gray - TS-GSK
相关代理商/技术参数
参数描述
950812CGLFT 功能描述:时钟发生器及支持产品 RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56
950812YFLFT 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:Frequency Generator with 200MHz Differential CPU Clocks
950812YGLFT 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:Frequency Generator with 200MHz Differential CPU Clocks
950813 制造商:Weidmuller 功能描述:NEXT 74/55/16, 4GP, ST, ZINC -EA - Bulk
9508131 制造商:Molex 功能描述: