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参数资料
| 型号： | 7007L35PF |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | SRAM |
| 英文描述： | 32K X 8 DUAL-PORT SRAM, 35 ns, PQFP80 |
| 封装： | 14 X 14 MM, 1.40 MM HEIGHT, GREEN, TQFP-80 |
| 文件页数： | 6/21页 |
| 文件大小： | 168K |
| 代理商： | 7007L35PF |
IDT7007S/L
High-Speed 32K x 8 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
14
Timing Waveform of Write with Port-to-Port Read and BUSY(2,5)
(M/S = VIH)(4)
Timing Waveform of Write with BUSY (M/S = VIL)
NOTES:
1. tWH must be met for both
BUSY input (SLAVE) and output (MASTER).
2.
BUSY is asserted on port "B" blocking R/W"B", until BUSY"B" goes HIGH.
2940 drw 13
tDW
tAPS
ADDR"A"
tWC
DATAOUT "B"
MATCH
tWP
R/
W"A"
DATAIN "A"
ADDR"B"
tDH
VALID
(1)
MATCH
BUSY"B"
tBDA
VALID
tBDD
tDDD
(3)
tWDD
NOTES:
1. To ensure that the earlier of the two ports wins. tAPS is ignored for M/
S = VIL (SLAVE).
2.
CEL = CER = VIL
3.
OE = VIL for the reading port.
4. If M/
S = VIL (SLAVE), then BUSY is an input (BUSY"A" = VIH and BUSY"B" = "don't care", for this example).
5. All timing is the same for left and right ports. Port "A" may be either the left or right port. Port "B" is the port opposite from port "A".
2940 drw 14
R/
W"A"
BUSY"B"
tWP
tWB
R/
W"B"
tWH
(1)
(2)
,
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相关代理商/技术参数 |
参数描述 |
|---|---|
| 7007L35PF8 | 制造商:Integrated Device Technology Inc 功能描述:SRAM Chip Async Dual 5V 256K-Bit 32K x 8 35ns 80-Pin TQFP T/R 制造商:Integrated Device Technology Inc 功能描述:SRAM ASYNC DUAL 5V 256KBIT 32KX8 35NS 80TQFP - Tape and Reel |
| 7007L55J | 功能描述:静态随机存取存储器 RoHS:否 制造商:Cypress Semiconductor 存储容量:16 Mbit 组织:1 M x 16 访问时间:55 ns 电源电压-最大:3.6 V 电源电压-最小:2.2 V 最大工作电流:22 uA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:TSOP-48 封装:Tray |
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| 7007L55PF | 功能描述:静态随机存取存储器 RoHS:否 制造商:Cypress Semiconductor 存储容量:16 Mbit 组织:1 M x 16 访问时间:55 ns 电源电压-最大:3.6 V 电源电压-最小:2.2 V 最大工作电流:22 uA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:TSOP-48 封装:Tray |
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