参数资料
型号: 440GP
厂商: Applied Micro Circuits Corp.
英文描述: Power PC 440GP Embedded Processor
中文描述: 440GP的Power PC嵌入式处理器
文件页数: 5/83页
文件大小: 773K
代理商: 440GP
440GP – Power PC 440GP Embedded Processor
AMCC
13
Revision 1.07 – October 4, 2007
Data Sheet
External master interface
- Write posting from external master
- Read prefetching on PLB for external master reads
- Bursting capable from external master
- Allows external master access to all non-EBC PLB slaves
- External master can control EBC slaves for own access and control
Ethernet Controller Interface
Ethernet support provided by the PPC440GP interfaces to the physical layer, but the PHY is not included on the
chip.
Features include:
One or two interfaces running in full- and half-duplex modes at 10Mb/s or 100Mb/s
- One full Media Independent Interface (MII) with 4-bit parallel data transfer
- Two Reduced Media Independent Interfaces (RMII) with 2-bit parallel data transfer
DMA Controller
Features include:
Supports the following transfers:
- Memory-to-memory transfers
- Buffered peripheral to memory transfers
- Buffered memory to peripheral transfers
Four channels
Scatter/Gather capability for programming multiple DMA operations
8-, 16-, 32-bit peripheral support (OPB and external)
64-bit addressing
Address increment or decrement
Supports internal and external peripherals
Support for memory mapped peripherals
Support for peripherals running on slower frequency buses
Serial Port
Features include:
One 8-pin UART and one 4-pin UART interface provided
Selectable internal or external serial clock to allow wide range of baud rates
Register compatibility with 16750 register set
Complete status reporting capability
Fully programmable serial-interface characteristics
Supports DMA using internal DMA engine
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