参数资料
型号: XC6SLX100T-2FG484I
厂商: Xilinx Inc
文件页数: 63/89页
文件大小: 0K
描述: IC FPGA SPARTAN 6 484FGGBGA
标准包装: 60
系列: Spartan® 6 LXT
LAB/CLB数: 7911
逻辑元件/单元数: 101261
RAM 位总计: 4939776
输入/输出数: 296
电源电压: 1.14 V ~ 1.26 V
安装类型: 表面贴装
工作温度: -40°C ~ 100°C
封装/外壳: 484-BBGA
供应商设备封装: 484-FBGA
Spartan-6 FPGA Data Sheet: DC and Switching Characteristics
DS162 (v3.0) October 17, 2011
Product Specification
66
Table 64: Global Clock Input to Output Delay With DCM in System-Synchronous Mode
Symbol
Description
Device
Speed Grade
Units
-3
-3N
-2
-1L
LVCMOS25 Global Clock Input to Output Delay using Output Flip-Flop, 12mA, Fast Slew Rate, with DCM in System-Synchronous Mode.
TICKOFDCM
Global Clock and OUTFF with DCM
XC6SLX4
4.23
N/A
6.11
6.60
ns
XC6SLX9
4.235.176.116.60
ns
XC6SLX16
4.28
4.57
5.34
6.36
ns
XC6SLX25
3.95
4.18
4.59
6.91
ns
XC6SLX25T
3.95
4.18
4.59
N/A
ns
XC6SLX45
4.37
4.70
5.50
6.85
ns
XC6SLX45T
4.37
4.70
5.50
N/A
ns
XC6SLX75
3.90
4.23
4.77
6.31
ns
XC6SLX75T
3.90
4.23
4.77
N/A
ns
XC6SLX100
3.864.164.667.25
ns
XC6SLX100T
3.90
4.16
4.66
N/A
ns
XC6SLX150
4.034.334.836.63
ns
XC6SLX150T
4.03
4.33
4.83
N/A
ns
XA6SLX4
4.55
N/A
6.11
N/A
ns
XA6SLX9
4.55
N/A
6.11
N/A
ns
XA6SLX16
4.62
N/A
5.33
N/A
ns
XA6SLX25
4.27
N/A
4.59
N/A
ns
XA6SLX25T
4.27
N/A
4.69
N/A
ns
XA6SLX45
4.69
N/A
5.50
N/A
ns
XA6SLX45T
4.69
N/A
5.50
N/A
ns
XA6SLX75
4.22
N/A
4.77
N/A
ns
XA6SLX75T
4.22
N/A
4.77
N/A
ns
XA6SLX100
N/A
5.34
N/A
ns
XQ6SLX75
N/A
4.77
6.31
ns
XQ6SLX75T
4.22
N/A
4.77
N/A
ns
XQ6SLX150
N/A
4.96
6.63
ns
XQ6SLX150T
4.62
N/A
4.96
N/A
ns
Notes:
1.
Listed above are representative values where one global clock input drives one vertical clock line in each accessible column, and where all accessible
IOB and CLB flip-flops are clocked by the global clock net.
2.
DCM output jitter is already included in the timing calculation.
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