- 您现在的位置：买卖IC网 > PDF目录16490 > SI5325/26-EVB (Silicon Laboratories Inc)BOARD EVAL FOR SI5325/26 PDF资料下载
参数资料
| 型号： | SI5325/26-EVB |
| 厂商： | Silicon Laboratories Inc |
| 文件页数： | 8/62页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR SI5325/26 |
| 标准包装： | 1 |
| 主要目的： | 计时，时钟发生器 |
| 已用 IC / 零件： | SI5325，SI5326 |
| 已供物品： | 板，线缆，CD，文档 |
第1页第2页第3页第4页第5页第6页第7页当前第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页
Si5325
16
Rev. 0.5
2. Functional Description
The Si5325 is a low jitter, precision clock multiplier for
applications requiring clock multiplication without jitter
attenuation. The Si5325 accepts dual clock inputs
ranging from 10 to 710 MHz and generates two
synchronous clock outputs ranging from 2 kHz to
945 MHz and select frequencies to 1.4 GHz. The device
provides frequency translation across this operating
range. Independent dividers are available for each input
clock and output clock, so the Si5325 can accept input
clocks at different frequencies and it can generate
output clocks at different frequencies. The Si5325 input
clock frequency and clock multiplication ratio are
programmable through an I2C or SPI interface. Silicon
Laboratories
offers
a
PC-based
software
utility,
DSPLLsim, that can be used to determine the optimum
PLL divider settings for a given input frequency/clock
multiplication ratio combination that minimizes phase
noise and power consumption. This utility can be
downloaded from http://www.silabs.com/timing (click on
Documentation).
The Si5325 is based on Silicon Laboratories' third-
generation
DSPLL
technology,
which
provides
frequency synthesis in a highly integrated PLL solution
that eliminates the need for external VCXO and loop
filter components. The Si5325 PLL loop bandwidth is
digitally programmable and supports a range from
150kHz to 1.3MHz. The DSPLLsim software utility can
be used to calculate valid loop bandwidth settings for a
given input clock frequency/clock multiplication ratio.
In the case when the input clocks enter alarm
conditions, the PLL will freeze the DCO output
frequency near its last value to maintain operation with
an internal state close to the last valid operating state.
The Si5325 has two differential clock outputs. The
electrical format of each clock output is independently
programmable to support LVPECL, LVDS, CML, or
CMOS loads. If not required, the second clock output
can be powered down to minimize power consumption.
For system-level debugging, a bypass mode is available
which drives the output clock directly from the input
clock, bypassing the internal DSPLL. The device is
powered by a single 1.8, 2.5, or 3.3 V supply.
2.1. Further Documentation
Consult
the
Silicon
Laboratories
Any-Frequency
Precision Clock Family Reference Manual (FRM) for
detailed information about the Si5325. Additional design
support is available from Silicon Laboratories through
your distributor.
Silicon
Laboratories
has
developed
a
PC-based
software utility called DSPLLsim to simplify device
configuration, including frequency planning and loop
bandwidth selection. The FRM and this utility can be
downloaded from http://www.silabs.com/timing; click on
Documentation.
相关PDF资料 |
PDF描述 |
|---|---|
| XC61CN2002MR-G | IC SUPERVISOR 2V SOT23-3 |
| M3AAK-1060K | IDC CABLE - MSC10K/MC10F/MSC10K |
| 1-6374659-0 | C/A LC TO LC MM 2.0MM 10M1 |
| H3DKH-5018M | IDC CABLE - HKR50H/AE50M/HPK50H |
| XR16V654DIV-0A-EB | EVAL BOARD FOR XR16V654D 64LQFP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| Si5325A-B-GM | 功能描述:锁相环 - PLL uP-PROGRAMMABE CLK MULT 10 MHZ-1.4 GHZ RoHS:否 制造商:Silicon Labs 类型:PLL Clock Multiplier 电路数量:1 最大输入频率:710 MHz 最小输入频率:0.002 MHz 输出频率范围:0.002 MHz to 808 MHz 电源电压-最大:3.63 V 电源电压-最小:1.71 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:QFN-36 封装:Tray |
| SI5325A-B-GMR | 制造商:Silicon Laboratories Inc 功能描述: |
| Si5325A-C-GM | 功能描述:锁相环 - PLL uP-PROGRAMMABE CLK MULT 10 MHZ-1.4 GHZ RoHS:否 制造商:Silicon Labs 类型:PLL Clock Multiplier 电路数量:1 最大输入频率:710 MHz 最小输入频率:0.002 MHz 输出频率范围:0.002 MHz to 808 MHz 电源电压-最大:3.63 V 电源电压-最小:1.71 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:QFN-36 封装:Tray |
| SI5325A-C-GMR | 功能描述:时钟发生器及支持产品 mP-Program Precision Clk Multiplier 2/2 RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| Si5325B-B-GM | 功能描述:锁相环 - PLL uP-PROGRAMMABE CLK MULT 10 MHZ-808 MHZ RoHS:否 制造商:Silicon Labs 类型:PLL Clock Multiplier 电路数量:1 最大输入频率:710 MHz 最小输入频率:0.002 MHz 输出频率范围:0.002 MHz to 808 MHz 电源电压-最大:3.63 V 电源电压-最小:1.71 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:QFN-36 封装:Tray |
发布紧急采购，3分钟左右您将得到回复。