参数资料
型号: MC33874BPNA
厂商: Freescale Semiconductor
文件页数: 10/38页
文件大小: 0K
描述: IC SW QUAD HI SIDE 35MOHM 24PQFN
标准包装: 168
类型: 高端
输入类型: SPI
输出数: 4
导通状态电阻: 35 毫欧
电源电压: 6 V ~ 27 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 24-PowerQFN
供应商设备封装: 24-PQFN(12x12)
包装: 托盘
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 4. Dynamic Electrical Characteristics
Characteristics noted under conditions 6.0V ≤ V PWR ≤ 27V, 4.5V ≤ V DD ≤ 5.5V, - 40 ° C ≤ T A ≤ 125 ° C, GND = 0V, unless
otherwise noted. Typical values noted reflect the approximate parameter means at T A = 25°C under nominal conditions, unless
otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
POWER OUTPUT TIMING (HS0, HS1, HS2, HS3)
Output Rising Slow Slew Rate A (DICR D3 = 0) (19)
SR RA _ SLOW
V/ μ s
9.0V < V PWR < 16V
Output Rising Slow Slew Rate B (DICR D3 = 0) (20)
9.0V < V PWR < 16V
Output Rising Fast Slew Rate A (DICR D3 = 1) (19)
9.0V < V PWR < 16V
Output Rising Fast Slew Rate B (DICR D3 = 1) (20)
9.0V < V PWR < 16V
Output Falling Slow Slew Rate A (DICR D3 = 0) (19)
9.0V < V PWR < 16V
Output Falling Slow Slew Rate B (DICR D3 = 0) (20)
9.0V < V PWR < 16V
Output Falling Fast Slew Rate A (DICR D3 = 1) (19)
9.0V < V PWR < 16V
Output Falling Fast Slew Rate B (DICR D3 = 1) (20)
9.0V < V PWR < 16V
Output Turn-ON Delay Time in Slow Slew Rate (21)
DICR = 0
Output Turn-ON Delay Time in Fast Slew Rate (21)
DICR = 1
Output Turn-OFF Delay Time in Slow Slew Rate Mode (22)
SR RB _ SLOW
SR RA _ FAST
SR RB _ FAST
SR FA _ SLOW
SR FB _ SLOW
SR FA _ FAST
SR FB _ FAST
t DLY_SLOW(ON)
t DLY_FAST(ON)
t DLY_SLOW(OF
0.1
0.015
0.5
0.025
0.1
0.015
0.5
0.025
2.0
1.0
0.3
0.05
1.5
0.3
0.3
0.05
1.5
0.3
30
6.0
0.75
0.15
3.0
1.0
0.75
0.15
3.0
1.0
200
100
V/ μ s
V/ μ s
V/ μ s
V/ μ s
V/ μ s
V/ μ s
V/ μ s
μ s
μ s
μ s
DICR = 0
Output Turn-OFF Delay Time in Fast Slew Rate Mode (22)
DICR = 1
F)
t DLY_FAST(OFF)
40
20
200
50
800
400
μ s
Over-current Low Detection Blanking Time
ms
OCLT[1:0]: 00
OCLT[1:0]: 01 (23)
OCLT[1:0]: 10
OCLT[1:0]: 11
t OCL0
t OCL1
t OCL2
t OCL3
108
55
0.08
155
75
0.15
202
95
0.3
Notes
19. Rise and Fall Slew Rates A measured across a 5.0 Ω resistive load at high side output = 0.5V to V PWR - 3.5V (see Figure 4 , page 12 ).
These parameters are guaranteed by process monitoring.
20. Rise and Fall Slew Rates B measured across a 5.0 Ω resistive load at high side output = 0.5V to V PWR - 3.5V (see Figure 4 ). These
parameters are guaranteed by process monitoring.
21. Turn-ON delay time measured from rising edge of any signal (IN[0 : 3], SCLK, CS ) that would turn the output ON to V HS[0 : 3] = 0.5V with
R L = 5.0 Ω resistive load.
22.
23.
Turn-OFF delay time measured from falling edge of any signal (IN[0 : 3], SCLK, CS ) that would turn the output OFF to V HS[0 : 3] = V PWR -
0.5V with R L = 5.0 Ω resistive load.
This logical bit is not defined. Do not use.
33874
Analog Integrated Circuit Device Data
10
Freescale Semiconductor
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