参数资料
型号: MAX6956ATL+T
厂商: Maxim Integrated
文件页数: 7/24页
文件大小: 0K
描述: IC DRVR DSPL LED 40-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
显示器类型: LED
接口: I²C
电流 - 电源: 180µA
电源电压: 2.5 V ~ 5.5 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 40-WFQFN 裸露焊盘
供应商设备封装: 40-TQFN-EP(6x6)
包装: 带卷 (TR)
2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or
28-Port LED Display Driver and I/O Expander
INTENSITY
INTENSITY REGISTERS
P4 TO P31
TEST
CONFIGURATION
TEST REGISTER
PORT REGISTERS
MASK REGISTER
MAX6956
LED DRIVERS
OR GPIO
LED DRIVERS AND GPIO
PORT CHANGE
DETECTOR
CONFIGURATION
REGISTERS
R/W
DATA
CE
8
SEGMENT OR
GPIO DATA
8
R/W
AD0
AD1
ADDRESS
MATCHER
COMMAND
REGISTER DECODE
7
8
DATA BYTE
COMMAND BYTE
8
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
SDA
7
7-BIT DEVICE ADDRESS
R/W
TO/FROM DATA REGISTERS
TO COMMAND REGISTERS
SCL
SLAVE ADDRESS BYTE
DATA BYTE
COMMAND BYTE
Figure 1. MAX6956 Functional Diagram
Shutdown mode is temporarily overridden by the dis-
play test function.
Serial Interface
Serial Addressing
The MAX6956 operates as a slave that sends and
receives data through an I 2 C-compatible 2-wire inter-
face. The interface uses a serial data line (SDA) and a
serial clock line (SCL) to achieve bidirectional commu-
nication between master(s) and slave(s). A master (typ-
ically a microcontroller) initiates all data transfers to and
from the MAX6956, and generates the SCL clock that
synchronizes the data transfer (Figure 2).
The MAX6956 SDA line operates as both an input and
an open-drain output. A pullup resistor, typically 4.7k ? ,
is required on SDA. The MAX6956 SCL line operates
only as an input. A pullup resistor, typically 4.7k ? , is
required on SCL if there are multiple masters on the 2-
wire interface, or if the master in a single-master system
has an open-drain SCL output.
Each transmission consists of a START condition
(Figure 3) sent by a master, followed by the MAX6956
7-bit slave address plus R/ W bit (Figure 6), a register
address byte, one or more data bytes, and finally a
STOP condition (Figure 3).
Start and Stop Conditions
Both SCL and SDA remain high when the interface is
not busy. A master signals the beginning of a transmis-
sion with a START (S) condition by transitioning SDA
from high to low while SCL is high. When the master
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7
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