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| 型号： | MAX16063TG+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 11/13页 |
| 文件大小： | 0K |
| 描述： | IC PWR MNTR/OVRVOLT PROT 24TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 应用： | 电源监控器，过压保护 |
| 电源电压： | 1 V ~ 5.5 V |
| 电流 - 电源： | 45µA |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-WFQFN 裸露焊盘 |
| 供应商设备封装： | 24-TQFN-EP（4x4） |
| 包装： | 带卷 (TR) |
1% Accurate, Low-Voltage,
Quad Window Voltage Detector
C SRT ( F ) =
?
?
? ?
RESET Output
RESET asserts low when the voltage on any of the
UVIN_ inputs falls below its respective threshold, the
voltage on any of the OVIN_ inputs goes above its
respective threshold, or MR is asserted. RESET
remains asserted for the reset timeout period after all
monitored UVIN_ inputs exceed their respective thresh-
olds, all OVIN_ inputs fall below their respective thresh-
olds, and MR is deasserted (see Figure 6). This
open-drain output has a 30μA internal pullup.
Reset Timeout Capacitor
The reset timeout period can be adjusted to accommo-
date a variety of microprocessor (μP) applications.
Adjust the reset timeout period (t RP ) by connecting a
capacitor (C SRT ) between SRT and GND. Calculate the
reset timeout capacitor as follows:
t RP ( s )
? V TH _ SRT ?
I SRT
Connect SRT to V CC for a factory-programmed reset
timeout of 140ms (min).
Manual Reset Input ( MR )
Many μP-based products require manual reset capabil-
ity, allowing the operator, a test technician, or external
logic circuitry to initiate a reset. A logic-low on MR
asserts RESET low. RESET remains asserted while MR
is low, and during the reset timeout period (140ms min)
after MR returns high. The MR input has an internal
20k ? pullup resistor to V CC , so it can be left open if it is
not used. MR can be driven with TTL or CMOS-logic
levels, or with open-drain/collector outputs. Connect a
normally open momentary switch from MR to GND to
create a manual reset function; external debounce cir-
cuitry is not required. If MR is driven from long cables
or if the device is used in a noisy environment, connect-
ing a 0.1μF capacitor from MR to GND provides addi-
tional noise immunity.
UVIN_
V TH_
V TH_ + V TH_HYS
V CC = 3.3V
5V
V CC
100k ?
V CC
RESET
t RD
10%
t RP
90%
UVOUT_
MAX16063
RESET
UVOUT_
t D
10%
t D
90%
GND
GND
V TH_
OVIN_
OVOUT_
90%
V TH_ - V TH_HYS
10%
t D
t D
Figure 5. Interfacing to a Different Logic Supply Voltage
Figure 6. Output Timing Diagram
______________________________________________________________________________________
11
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| MAX16065ETM+ | 功能描述:监控电路 12Ch Power Supply Sequencer RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
| MAX16065ETM+T | 功能描述:监控电路 12Ch Power Supply Sequencer RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
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