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参数资料
| 型号： | LTC3633IUFD#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 18/28页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 3A DL 28QFN |
| 标准包装： | 73 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 2 |
| 输出电压： | 0.6 V ~ 14.7 V |
| 输入电压： | 3.6 V ~ 15 V |
| PWM 型： | 电流模式，混合 |
| 频率 - 开关： | 500kHz ~ 4MHz |
| 电流 - 输出： | 3A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-WFQFN 裸露焊盘 |
| 包装： | 管件 |
| 供应商设备封装： | 28-QFN（4x5） |
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LTC3633
APPLICATIONS INFORMATION
The ratio of this divider should be the same as that of the
slave channel’s feedback divider shown in Figure 5a. In
this tracking mode, V OUT1 must be set higher than V OUT2 .
To implement the ratiometric tracking, the feedback pin of
the master channel should connect to the TRACKSS pin of
the slave channel (as in Figure 5b). By selecting different
resistors, the LTC3633 can achieve different modes of
tracking including the two in Figure 4.
Upon start-up, the regulator defaults to Burst Mode opera-
tion until the output exceeds 80% of its final value (V FB >
0.48V). Once the output reaches this voltage, the operating
mode of the regulator switches to the mode selected by
the MODE/SYNC pin as described above. During normal
operation, if the output drops below 10% of its final value
(as it may when tracking down, for instance), the regulator
will automatically switch to Burst Mode operation to prevent
inductor saturation and improve TRACKSS pin accuracy.
Output Power Good
The PGOOD output of the LTC3633 is driven by a 15Ω
(typical) open-drain pull-down device. This device will be
turned off once the output voltage is within 5% (typical) of
the target regulation point, allowing the voltage at PGOOD
to rise via an external pull-up resistor. If the output voltage
exits an 8% (typical) regulation window around the target
regulation point, the open-drain output will pull down
with 15Ω output resistance to ground, thus dropping the
PGOOD pin voltage. This behavior is described in Figure 6.
NOMINAL OUTPUT
PGOOD
VOLTAGE
–8% –5% 0% 5% 8% OUTPUT VOLTAGE
3633 F06
Figure 6. PGOOD Pin Behavior
A filter time of 40μs (typical) acts to prevent unwanted
PGOOD output changes during V OUT transient events.
As a result, the output voltage must be within the target
regulation window of 5% for 40μs before the PGOOD pin
pulls high. Conversely, the output voltage must exit the
8% regulation window for 40μs before the PGOOD pin
pulls to ground.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
V OUT1
V OUT2
V OUT1
V OUT2
TO
TRACKSS2
PIN
R3
R4
R1
R2
TO
V FB1
PIN
TO
V FB2
PIN
R3
R4
TO
TRACKSS2
PIN
R1
R2
TO
V FB1
PIN
TO
V FB2
PIN
R3
R4
3633 F05
(5a) Coincident Tracking Setup
(5b) Ratiometric Tracking Setup
Figure 5. Setup for Coincident and Ratiometric Tracking
3633fc
18
For more information www.linear.com/LTC3633
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