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| 型号： | LTC3633IUFD#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 13/28页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 3A DL 28QFN |
| 标准包装： | 73 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 2 |
| 输出电压： | 0.6 V ~ 14.7 V |
| 输入电压： | 3.6 V ~ 15 V |
| PWM 型： | 电流模式，混合 |
| 频率 - 开关： | 500kHz ~ 4MHz |
| 电流 - 输出： | 3A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-WFQFN 裸露焊盘 |
| 包装： | 管件 |
| 供应商设备封装： | 28-QFN（4x5） |
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LTC3633
APPLICATIONS INFORMATION
V OUT ( V IN – V OUT )
I RMS =I OUT(MAX)
? V OUT < ? I L ? ESR + ?
Ferrite designs exhibit very low core loss and are pre-
ferred at high switching frequencies, so design goals
can concentrate on copper loss and preventing satura-
tion. Ferrite core material saturates “hard”, which means
that inductance collapses abruptly when the peak design
current is exceeded. This results in an abrupt increase in
inductor ripple current, so it is important to ensure that
the core will not saturate.
Different core materials and shapes will change the size/
current and price/current relationship of an inductor. Toroid
or shielded pot cores in ferrite or permalloy materials are
small and don’t radiate much energy, but generally cost
more than powdered iron core inductors with similar
characteristics. The choice of which style inductor to use
mainly depends on the price versus size requirements
and any radiated field/EMI requirements. Table 1 gives a
sampling of available surface mount inductors.
Table 1. Inductor Selection Table
MAX
INDUCTANCE DCR CURRENT DIMENSIONS HEIGHT
(μH) (mΩ) (A) (mm) (mm)
Würth Electroni k WE-HC 744312 Series
0.25 2.5 18 7 × 7.7 3.8
0.47 3.4 16
0.72 7.5 12
1.0 9.5 11
1.5 10.5 9
Vishay IHLP-2020BZ-01 Series
0.22 5.2 15 5.2 × 5.5 2
0.33 8.2 12
0.47 8.8 11.5
0.68 12.4 10
1 20 7
Toko FDV0620 Series
0.20 4.5 12.4 7 × 7.7 2.0
0.47 8.3 9.0
1.0 18.3 5.7
Coilcraft D01813H Series
0.33 4 10 6 × 8.9 5.0
0.56 10 7.7
1.2 17 5.3
TDK RLF7030 Series
1.0 8.8 6.4 6.9 × 7.3 3.2
1.5 9.6 6.1
C IN and C OUT Selection
The input capacitance, C IN , is needed to filter the trapezoi-
dal wave current at the drain of the top power MOSFET.
To prevent large voltage transients from occurring, a low
ESR input capacitor sized for the maximum RMS current
is recommended. The maximum RMS current is given by:
V IN
This formula has a maximum at V IN = 2V OUT , where
I RMS ? I OUT /2. This simple worst case condition is com-
monly used for design because even significant deviations
do not offer much relief. Note that ripple current ratings
from capacitor manufacturers are often based on only
2000 hours of life which makes it advisable to further de-
rate the capacitor, or choose a capacitor rated at a higher
temperature than required.
Several capacitors may also be paralleled to meet size or
height requirements in the design. For low input voltage
applications, sufficient bulk input capacitance is needed
to minimize transient effects during output load changes.
Even though the LTC3633 design includes an overvoltage
protection circuit, care must always be taken to ensure
input voltage transients do not pose an overvoltage hazard
to the part.
The selection of C OUT is determined by the effective series
resistance (ESR) that is required to minimize voltage ripple
and load step transients as well as the amount of bulk
capacitance that is necessary to ensure that the control
loop is stable. Loop stability can be checked by viewing
the load transient response. The output ripple, ?V OUT , is
approximated by:
? 1 ?
? 8 ? f ? C OUT ?
When using low-ESR ceramic capacitors, it is more useful
to choose the output capacitor value to fulfill a charge stor-
age requirement. During a load step, the output capacitor
3633fc
For more information www.linear.com/LTC3633
13
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