参数资料
| 型号： | ISL28274FAZ-T7 |
| 厂商： | Intersil |
| 文件页数： | 9/18页 |
| 文件大小： | 0K |
| 描述： | IC INSTR/OP AMP RRIO SGL 16-QSOP |
| 标准包装： | 1 |
| 放大器类型： | 仪表 |
| 电路数： | 2 |
| 输出类型： | 满摆幅 |
| 转换速率： | 0.5 V/µs |
| 增益带宽积： | 6MHz |
| 电流 - 输入偏压： | 10pA |
| 电压 - 输入偏移： | 35µV |
| 电流 - 电源： | 120µA |
| 电流 - 输出 / 通道： | 31mA |
| 电压 - 电源，单路/双路(±)： | 2.4 V ~ 5 V，±1.2 V ~ 2.5 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-QSOP |
| 包装： | 标准包装 |
| 产品目录页面： | 1235 (CN2011-ZH PDF) |
| 其它名称： | ISL28274FAZ-T7DKR |
17
FN6345.3
May 14, 2009
A finite resistance RS in series with the VREF source, adds an
output offset of VIN*(RS/RG). As the series resistance RS
approaches zero, the gain equation is simplified to Equation 3
for Figure 63. VOUT is simply shifted by an amount VREF.
External Resistor Mismatches
Because of the independent pair of feedback terminals
provided by the ISL28274, the CMRR is not degraded by
any resistor mismatches. Hence, unlike a three op amp and
especially a two op amp in-amp, the ISL28274 reduces the
cost of external components by allowing the use of 1% or
more tolerance resistors without sacrificing CMRR
performance. The ISL28274 CMRR will be 100dB
regardless of the tolerance of the resistors used.
Using Only the Instrumentation Amplifier
If the application only requires the instrumentation amp, the
user must configure the unused op amp to prevent it from
oscillating. The unused op amp will oscillate if the input and
output pins are floating. This will result in higher than
expected supply currents and possible noise injection into
the in-amp. The proper way to prevent this oscillation is to
short the output to the negative input and ground the positive
input (as shown in Figure 64).
Proper Layout Maximizes Performance
To achieve the maximum performance of the high input
impedance and low offset voltage, care should be taken in
the circuit board layout. The PC board surface must remain
clean and free of moisture to avoid leakage currents
between adjacent traces. Surface coating of the circuit board
will reduce surface moisture and provide a humidity barrier,
reducing parasitic resistance on the board. When input
leakage current is a concern, the use of guard rings around
the amplifier inputs will further reduce leakage currents.
Figure 65 shows a guard ring example for a unity gain
amplifier that uses the low impedance amplifier output at the
same voltage as the high impedance input to eliminate
surface leakage. The guard ring does not need to be a
specific width, but it should form a continuous loop around
both inputs. For further reduction of leakage currents,
components can be mounted to the PC board using Teflon
standoff insulators.
Current Limiting
The ISL28274 has no internal current-limiting circuitry. If the
output is shorted, it is possible to exceed the Absolute
Maximum Rating for output current or power dissipation,
potentially resulting in the destruction of the device.
Power Dissipation
It is possible to exceed the +150°C maximum junction
temperatures under certain load and power-supply
conditions. It is therefore important to calculate the
maximum junction temperature (TJMAX) for all applications
to determine if power supply voltages, load conditions, or
package type need to be modified to remain in the safe
operating area. These parameters are related in Equation 4:
where:
PDMAXTOTAL is the sum of the maximum power
dissipation of each amplifier in the package (PDMAX)
PDMAX for each amplifier can be calculated as shown in
Equation 5:
where:
TMAX = Maximum ambient temperature
θ
JA = Thermal resistance of the package
PDMAX = Maximum power dissipation of 1 amplifier
VS = Supply voltage (Magnitude of V+ and V-)
IMAX = Maximum supply current of 1 amplifier
VOUTMAX = Maximum output voltage swing of the
application
RL = Load resistance
VOUT
1
R
F
R
G
--------
+
VIN
()
VREF
()
+
=
(EQ. 3)
FIGURE 64. PREVENTING OSCILLATIONS IN UNUSED
CHANNELS
-
+
1/2 ISL28274
IN
V+
FIGURE 65. GUARD RING EXAMPLE FOR UNITY GAIN
AMPLIFIER
HIGH IMPEDANCE INPUT
1/4 ISL28474
T
JMAX
T
MAX
θ
JAxPDMAXTOTAL
()
+
=
(EQ. 4)
PD
MAX
2*V
S
I
SMAX
V
S
(
- V
OUTMAX )
V
OUTMAX
R
L
----------------------------
×
+
×
=
(EQ. 5)
ISL28274, ISL28474
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