参数资料
型号: ATTINY13V-10SSUR
厂商: Atmel
文件页数: 52/176页
文件大小: 0K
描述: MCU AVR 1KB FLASH 10MHZ 8SOIC
产品培训模块: tinyAVR Introduction
标准包装: 4,000
系列: AVR® ATtiny
核心处理器: AVR
芯体尺寸: 8-位
速度: 10MHz
外围设备: 欠压检测/复位,POR,PWM,WDT
输入/输出数: 6
程序存储器容量: 1KB(512 x 16)
程序存储器类型: 闪存
EEPROM 大小: 64 x 8
RAM 容量: 64 x 8
电压 - 电源 (Vcc/Vdd): 1.8 V ~ 5.5 V
数据转换器: A/D 4x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
包装: 带卷 (TR)
其它名称: ATTINY13V-10SSUR-ND
ATTINY13V-10SSURTR
2010-2011 Microchip Technology Inc.
Preliminary
DS41430C-page 145
PIC16(L)F720/721
17.1.2.4
Slave Select Operation
The SS pin allows Synchronous Slave mode operation.
The SPI must be in Slave mode with SS pin control
enabled (SSPM<3:0> = 0100). The associated TRIS bit
for the SS pin must be set, making SS an input.
In Slave Select mode, when:
SS = 0, The device operates as specified in
SS = 1, The SPI module is held in Reset and the
SDO pin will be tri-stated.
When the SPI module resets, the bit counter is cleared
to ‘0’. This can be done by either forcing the SS pin to
a high level or clearing the SSPEN bit. Figure 17-6
shows the timing waveform for such a synchronization
event.
17.1.2.5
Sleep in Slave Mode
While in Sleep mode, the slave can transmit/receive
data. The SPI Transmit/Receive Shift register operates
asynchronously to the device on the externally supplied
clock source. This allows the device to be placed in
Sleep mode and data to be shifted into the SPI Trans-
mit/Receive Shift register. When all 8 bits have been
received, the SSP Interrupt Flag bit will be set and, if
enabled, will wake the device from Sleep.
FIGURE 17-6:
SLAVE SELECT SYNCHRONIZATION WAVEFORM
Note 1: When the SPI is in Slave mode with SS
pin control enabled (SSPM<3:0> = 0100),
the SPI module will reset if the SS pin is
driven high.
2: If the SPI is used in Slave mode with CKE
set, the SS pin control must be enabled.
Note:
SSPSR must be reinitialized by writing to
the SSPBUF register before the data can
be clocked out of the slave again.
SCK
(CKP = 1
SCK
(CKP = 0
Input
Sample
SDI
bit 7
SDO
bit 7
bit 6
bit 7
SSPIF
Interrupt
(SMP = 0)
CKE = 0)
(SMP = 0)
Write to
SSPBUF
SSPSR to
SSPBUF
SS
Flag
bit 0
bit 7
bit 0
SSPSR must be reinitialized by writing to
the SSPBUF register before the data can
be clocked out of the slave again.
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