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| 型号： | A3989SEVTR-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 1/13页 |
| 文件大小： | 0K |
| 描述： | IC STEPPER/MOTOR DRIVER 36-QFN |
| 标准包装： | 1 |
| 应用： | 直流电机驱动器，步进电机驱动器 |
| 输出数： | 2 |
| 电压 - 负载： | 8 V ~ 36 V |
| 电源电压： | 3 V ~ 5.5 V |
| 工作温度： | -20°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 36-VFQFN 裸露焊盘 |
| 供应商设备封装： | 36-QFN-EP（6x6） |
| 包装： | 标准包装 |
| 产品目录页面： | 1141 (CN2011-ZH PDF) |
| 其它名称： | 620-1183-6 |
A3989
Bipolar Stepper and High Current DC Motor Driver
Features and Benefits
Description
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36 V output rating
2.4 A DC motor driver
1.2 A bipolar stepper driver
Synchronous rectification
Internal undervoltage lockout (UVLO)
Thermal shutdown circuitry
Crossover-current protection
Very thin profile QFN package
The A3989 is designed operate at voltages up to 36 V while driving
one bipolar stepper motor, at currents up to 1.2A, and one DC motor,
at currents up to 2.4 A. The A3989 includes a fixed off-time pulse
width modulation (PWM) regulator for current control. The stepper
motor driver features dual 2-bit nonlinear DACs (digital-to-analog
converters) that enable control in full, half, and quarter steps. The
DC motor is controlled using standard PHASE and ENABLE signals.
Fast or slow current decay is selected via the MODE pin. The PWM
current regulator uses the Allegro ? patented mixed decay mode for
reduced audible motor noise, increased step accuracy, and reduced
power dissipation.
Internal synchronous rectification control circuitry is provided to
Package: 36 pin QFN with exposed thermal pad
0.90 mm nominal height (suffix EV)
improve power dissipation during PWM operation.
Protection features include thermal shutdown with hysteresis,
undervoltage lockout (UVLO) and crossover current protection.
Special power up sequencing is not required.
The A3989 is supplied in a leadless 6 mm × 6 mm × 0.9 mm,
36 pin QFN package with exposed power tab for enhanced thermal
performance. The package is lead (Pb) free, with 100% matte tin
leadframe plating.
Approximate scale 1:1
0.1 μ F
0.1 μ F
50 V
50 V
100 μ F
50 V
0.22 μ F
50 V
CP1
CP2
VCP
VBB
VBB
VDD
OUT1A
OUT1B
PHASE1
I01
A3989
SENSE1
Microcontroller or
Controller Logic
I11
PHASE2
I02
I12
PHASE3
ENABLE
MODE
VREF1
VREF2
OUT2A
OUT2B
SENSE2
OUT3A
OUT3A
OUT3B
OUT3B
SENSE3
VREF3
GND
GND
SENSE3
Figure 1. Typical application circuit
A3989DS, Rev. 3
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