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参数资料
| 型号： | 950218AFLFT |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 200.4 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封装： | 0.300 INCH, SSOP-48 |
| 文件页数： | 9/20页 |
| 文件大小： | 331K |
| 代理商： | 950218AFLFT |
17
Third party brands and names are the property of their respective owners.
Integrated
Circuit
Systems, Inc.
ICS950218
Preliminary Product Preview
All 3V66 clocks are to be in pphase with each other. In the case where 3V66_1 is configured as 48MHz VCH clock, there is no
defined phase relationship between 3V66_1/VCH and other 3V66 clocks. The PCI group should lag 3V66 by the standard
skew described below as Tpci.
Un-Buffered Mode 3V66 & PCI Phase Relationship
3V66
PCICLK_F and PCICLK
Tpci
Group Skews at Common Transition Edges: (Un-Buffered Mode)
GROUP
SYMBOL
CONDITIONS
MIN
TYP
MAX UNITS
3V66
3V66 pin to pin skew
0
500
ps
PCI
PCI_F and PCI pin to pin skew
0
500
ps
3V66 to PCI
S3V66-PCI
3V66 leads 33MHz PCI
1.5
3.5
ns
1Guarenteed by design, not 100% tested in production.
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| 950220AFLFT | 功能描述:时钟发生器及支持产品 RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
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