参数资料
型号: 70V3319S166BFG
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: SRAM
英文描述: 256K X 18 DUAL-PORT SRAM, 3.6 ns, CBGA208
封装: 15 X 15 MM X 1.4 MM, 0.80 MM PITCH, GREEN, FPBGA-208
文件页数: 9/23页
文件大小: 222K
代理商: 70V3319S166BFG
6.42
IDT70V3319/99S
High-Speed 3.3V 256/128K x 18 Dual-Port Synchronous Static RAM
Industrial and Commercial Temperature Ranges
17
ADDRESS
An
CLK
DATAOUT
Qx - 1
(2)
Qx
Qn
Qn + 2
(2)
Qn + 3
ADS
CNTEN
tCYC2
tCH2
tCL2
5623 drw 16
tSA
tHA
tSAD tHAD
tCD2
tDC
READ
EXTERNAL
ADDRESS
READ WITH COUNTER
COUNTER
HOLD
tSAD tHAD
tSCN tHCN
READ
WITH
COUNTER
Qn + 1
Timing Waveform of Pipelined Read with Address Counter Advance(1)
NOTES:
1.
CE0, OE, UB, LB = VIL; CE1, R/W, and REPEAT = VIH.
2. If there is no address change via
ADS = VIL (loading a new address) or CNTEN = VIL (advancing the address), i.e. ADS = VIH and CNTEN = VIH, then
the data output remains constant for subsequent clocks.
Timing Waveform of Flow-Through Read with Address Counter Advance(1)
ADDRESS
An
CLK
DATAOUT
Qx
(2)
Qn
Qn + 1
Qn + 2
Qn + 3
(2)
Qn + 4
ADS
CNTEN
tCYC1
tCH1
tCL1
5623 drw 17
tSA
tHA
tSAD tHAD
READ
EXTERNAL
ADDRESS
READ WITH COUNTER
COUNTER
HOLD
tCD1
tDC
tSAD tHAD
tSCN tHCN
READ
WITH
COUNTER
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