参数资料
型号: XRT83L34IVTR
厂商: Exar Corporation
文件页数: 3/99页
文件大小: 0K
描述: IC LIU T1/E1/J1 QUAD 128TQFP
标准包装: 750
类型: 线路接口装置(LIU)
驱动器/接收器数: 4/4
规程: T1,E1,J1
电源电压: 3.135 V ~ 3.465 V
安装类型: 表面贴装
封装/外壳: 128-LQFP
供应商设备封装: 128-TQFP(14x20)
包装: 带卷 (TR)
xr
XRT83L34
QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR REV. 1.0.1
8
RXRES0
RXRES1
108
109
I
Receive External Resistor Control Pins - Hardware mode
Receive External Resistor Control Pin 0
Receive External Resistor Control Pin 1
These pins are used to determine the value of the external Receive fixed
resistor according to the following table:
NOTE: These pins are internally pulled “Low” with 50k
resistor.
RCLKE
PTS1
106
I
Receive Clock Edge Select/Microprocessor Type Select Input pin:
The exact function of this input pin depends upon whether the XRT83L34
device has been configured to operate in the HOST or Hardware Mode, as
described below.
Hardware Mode Operation - Receive Clock Edge Select Input pin -
RCLKE:
This input pin permits the user to configure the Receive Section (of each
channel within the XRT83L34 device) to update the data (that is output via
the RPOS_n/RDATA_n and RNEG_n/LCV_n output pins) upon either the ris-
ing edge or falling edge of the RCLK_n output clock signal, as depicted
below.
LOW - Configures all four channels to update the RPOS_n/RDATA_n and
RNEG_n/LCV_n output pins upon rising edge of RCLK_n.
HIGH - Configures all four channels to update the RPOS_n/RDATA_n and
RNEG_n/LCV_n output pins upon the falling edge of RCLK_n.
HOST Mode Operation - Microprocessor Type Select Input pin # 1:
This pin is used to select the microprocessor type.
NOTE: This pin is internally pulled "Low" with a 50k
resistor.
SIGNAL NAME
PIN #TYPE
DESCRIPTION
Required Fixed External
RX Resistor
No External Fixed Resistor
240
210
150
RXRES0
0
1
0
1
RXRES1
0
1
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