参数资料
型号: XRT75R03DIVTR
厂商: Exar Corporation
文件页数: 49/135页
文件大小: 0K
描述: IC LIU E3/DS3/STS-1 3CH 128LQFP
标准包装: 750
类型: 线路接口装置(LIU)
驱动器/接收器数: 3/3
规程: DS3,E3,STS-1
电源电压: 3.135 V ~ 3.465 V
安装类型: 表面贴装
封装/外壳: 128-LQFP
供应商设备封装: 128-LQFP(14x20)
包装: 带卷 (TR)
XRT75R03D
16
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCRONIZER
REV. 1.0.4
108
DS3Clk/ CLK_OUT
I/O
DS3 Reference Clock Input/SFM Synthesizer Clock Output:
The function of this chip depends upon whether or not the XRT75R03D has
been configured to operate in the SFM Mode.
If NOT operating in the Single-Frequency Mode
If the XRT75R03D has NOT been configured to operate in the SFM Mode, and
if at least one channel of the XRT75R03D is configured in the DS3 Mode, then
a clock signal with a frequency of 44.736 MHz ± 20ppm must be applied to this
input pin.
If the XRT75R03D is not configured to operate in the SFM Mode and none of
the channels are to be operated in the DS3 Mode, tie this input signal to GND.
If operating in the Single-Frequency Mode
If the XRT75R03D is configured to operate in the SFM Mode, and if pin 107
(E3CLK/CLKEN) is pulled to a logic "High", then the SFM Clock Synthesizer
PLL generated line rate clock signal for Channel 1 will be output via this output
pin.
In this mode, this particular output pin can be used by the user's system as a
timing source.
109
STS-1Clk/ 12M
I
STS-1 Reference Clock Input/12.288MHz SFM Reference Clock Input:
The function of this pin depends upon whether or not the XRT75R03D has been
configured to operate in the SFM Mode.
If NOT operating in the Single-Frequency Mode
If the XRT75R03D has NOT been configured to operate in the SFM Mode and if
at least one channel is intended to operate in the STS-1 Mode, then the user
must supply a clock signal with a frequency of 51.84MHz ± 20ppm to this input
pin
If the XRT75R03D is not to be operatedin the SFM Mode and none of the chan-
nels are to be operated in the STS-1 Mode, tie this input signal to GND.
If operating in the Single-Frequency Mode
If the XRT75R03D has been configured to operate in the SFM Mode a clock sig-
nal with a frequency of 12.288MHz ± 20ppm MUST be applied to this input pin.
The SFM Synthesizer will then synthesize all of the appropriate line rate fre-
quencies (e.g., 34.368MHz for E3, 44.736MHz for DS3, and 51.84MHz for STS-
1) based upon this 12.288MHz Reference Clock source.
SYSTEM-SIDE RECEIVE OUTPUT AND RECEIVE CONTROL PINS
PIN #
SIGNAL NAME
TYPE
DESCRIPTION
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