参数资料
型号: TISP6NTP2CDR-S
厂商: Bourns Inc.
文件页数: 3/7页
文件大小: 0K
描述: SURGE PROT THYRIST 155VDUAL SLIC
产品培训模块: ESD Protection Products
产品变化通告: Wire Color Change May 2008
产品目录绘图: TISP6NTP2(A,C)DR Schematic
标准包装: 1
电压 - 工作: -100V
电压 - 箝位: -112V
技术: 混合技术
电路数: 4
应用: SLIC
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 标准包装
产品目录页面: 2379 (CN2011-ZH PDF)
其它名称: TISP6NTP2CDR-SDKR
TISP6NTP2C High Voltage Ringing SLIC Protector
Electrical Characteristics, 0 ° C ≤ TJ ≤ 70 ° C (Unless Otherwise Noted)
Parameter
Test Conditions
Min
Typ
Max
Unit
I D
V (BO)
Off-state current
Ramp breakover
voltage
V D = V DRM , V GK = 0
UL 497B, dv/dt ≤ ± 100 V/ μ s, di/dt = ± 10 A/ μ s,
V GG = -100 V, Maximum ramp value = ± 10 A
T J = 25 ° C
T J = 25 ° C
-5
-50
-112
μ A
μ A
V
V (BO)
V GK(BO)
V F
Impulse breakover
voltage
Gate-cathode impulse
breakover voltage
Forward voltage
2/10 μ s, I TM = -27 A, di/dt = -27 A/ μ s, R S = 50 ? , V GG = -100 V,
(see Note 3)
2/10 μ s, I TM = -27 A, di/dt = -27 A/ μ s, R S = 50 ? , V GG = -100 V,
(see Note 3)
I F = 5 A, t w = 200 μ s
-115
15
3
V
V
V
V FRM
V FRM
I H
I GKS
I GT
V GT
C KA
Ramp peak forward
recovery voltage
Impulse peak forward
recovery voltage
Holding current
Gate reverse current
Gate trigger current
Gate-cathode trigger
voltage
Cathode-anode off-
state capacitance
UL 497B, dv/dt ≤ ± 100 V/ μ s, di/dt = ± 10 A/ μ s,
Maximum ramp value = ± 10 A
2/10 μ s, I TM = -27 A, di/dt = -27 A/ μ s, R S = 50 ? ,
(see Note 3)
I T = -1 A, di/dt = 1A/ms, V GG = -100 V
V GG = V GK = V GKRM , V KA = 0
I T = -3 A, t p(g) ≥ 20 μ s, V GG = -100 V
I T = -3 A, t p(g) ≥ 20 μ s, V GG = -100 V
f = 1 MHz, V d = 1 V, I G = 0, (see Note 4)
T J = 25 ° C
T J = 25 ° C
T J = 25 ° C
V D = -3 V
V D = -48 V
-150
5
12
-5
-50
5
6
2.5
100
50
V
V
mA
μ A
μ A
mA
mA
V
pF
pF
NOTES: 3. GR-1089-CORE intra-building 2/10, 1.5 kV conditions with 20 MHz bandwidth. The diode forward recovery and the thyristor gate
impulse breakover (overshoot) are not strongly dependent of the SLIC supply voltage value (V GG ).
4. These capacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. The unmeasured
device terminals are a.c. connected to the guard terminal of the bridge.
Thermal Characteristics
R θ JA
Parameter
Junction to free air thermal resistance
Test Conditions
T A = 70 ° C, EIA/JESD51-3 PCB,
EIA/JESD51-2 environment, P tot = 0.52 W
Min
Typ
Max
160
Unit
° C/W
MARCH 2002 – REVISED JULY 2008
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
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