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参数资料
| 型号： | THS1206IDARG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | ADC |
| 英文描述： | 4-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32 |
| 封装： | GREEN, PLASTIC, TSSOP-32 |
| 文件页数： | 15/43页 |
| 文件大小： | 722K |
| 代理商： | THS1206IDARG4 |
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THS1206
SLAS217H – MAY 1999 – REVISED JULY 2003#
www.ti.com
22
READING DATA FROM THE FIFO
The THS1206 informs the connected processor via the digital output DATA_AV (data available) that a block of conversion
values are ready to be read. The block size to be read is always equal to the setting of the trigger level. The selectable trigger
levels depend on the number of selected analog input channels. For example, when choosing one analog input, a trigger
level of 1, 4, 8 and 14 can be selected. The following figures demonstrate the principle of reading the data.
In Figure 30, a trigger level of 1 is selected. The control signal DATA_AV is set to an active low pulse. This means that the
connected processor has the task to read 1 value from the ADC after every DATA_AV low pulse.
CONV_CLK
DATA_AV
READ
Figure 30. Trigger Level 1 Selected
In Figure 31, a trigger level of 4 is selected. The control signal DATA_AV is set to an active low pulse. This means that the
connected processor has the task to read 4 values from the ADC after every DATA_AV low pulse.
CONV_CLK
DATA_AV
READ
Figure 31. Trigger Level 4 Selected
In Figure 32, a trigger level of 8 is selected. The control signal DATA_AV is set to an active low pulse. This means that the
connected processor has the task to read 8 values from the ADC after every DATA_AV low pulse.
CONV_CLK
DATA_AV
READ
Figure 32. Trigger Level 8 Selected
In Figure 33, a trigger level of 14 is selected. The control signal DATA_AV is set to an active low pulse. This means that
the connected processor has the task to read 14 values from the ADC after every DATA_AV low pulse.
CONV_CLK
DATA_AV
READ
Figure 33. Trigger Level 14 Selected
READ is always the logical combination of CS0, CS1, and RD.
相关PDF资料 |
PDF描述 |
|---|---|
| THS1206IDAG4 | 4-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32 |
| THS1206CDAR | 4-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32 |
| THS1206CDA | 4-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32 |
| THS1206QDAR | 4-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32 |
| THS1206MDAREP | 4-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| THS1206MDA | 制造商:Texas Instruments 功能描述:ADC SGL PIPELINED 6MSPS 12-BIT PARALLEL 32TSSOP - Tape and Reel |
| THS1206MDAREP | 功能描述:模数转换器 - ADC EP 12B,6Msps ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| THS1206M-EVM | 功能描述:数据转换 IC 开发工具 THS1206M Eval Module RoHS:否 制造商:Texas Instruments 产品:Demonstration Kits 类型:ADC 工具用于评估:ADS130E08 接口类型:SPI 工作电源电压:- 6 V to + 6 V |
| THS1206QDA | 功能描述:模数转换器 - ADC 12-Bit 6 MSPS Quad Channel RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| THS1206QDAR | 功能描述:模数转换器 - ADC 12 Bit 6 MSPS Quad Channel RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
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