
TFP6422, TFP6424
PanelBus
DIGITAL TRANSMITTER/VIDEO ENCODER COMBO
SLDS118 – MARCH 2000
33
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
register description
The default register settings are indicated with (*). If two defaults are indicated, the state of INT0 / CBARE at
reset will determine which default is used.
VEN_ID
Subaddress = 00
Read Only
Default = 0x4C
7
6
5
4
3
2
1
0
VEN_ID[7:0]
Subaddress = 01
Read Only
Default = 0x01
7
6
5
4
3
2
1
0
VEN_ID[15:8]
This read-only register contains the 16–bit Texas Instruments vendor ID for the TFP6422/6424. VEN_ID[15:0]
is hardwired to 0x014C.
DEV_ID
Subaddress = 02
Read Only
Default = 0x22/23
7
6
5
4
3
2
1
0
DEV_ID[7:0]
Subaddress = 03
Read Only
Default = 0x64
7
6
5
4
3
2
1
0
DEV_ID[15:8]
This read-only register contains the 16-bit device ID for the TFP6422 and TFP6424. The revision ID will identify
different revisions of the device. For TFP6422, DEV_ID[15:0] is hardwired to 0x6422. For TFP6424,
DEV_ID[15:0] is hardwired to 0x6424.
REV_ID
Subaddress = 03
Read Only
Default = 0x01
7
6
5
4
3
2
1
0
REV_ID[7:0]
This read-only register contains the revision ID for the TFP6422 and TFP6424. The revision ID will identify
different revisions of the device. REV_ID[7:0] is hardwired to 0x01.
STATUS
Subaddress = 05
Read Only
7
6
5
4
3
2
1
0
CCE
CCO
FSQ[2:0]
CCE
Closed caption status for even field. This bit is set immediately after the data in registers LINE21_E0 and
LINE21_E1 have been encoded to closed caption. This bit is reset when both of these registers are written.
CCO
Closed caption status for odd field. This bit is set immediately after the data in registers LINE21_O0 and
LINE21_O1 have been encoded to closed caption. This bit is reset when both of these registers are written.
FSQ[2:0] Field sequence ID. For PAL, all three FSQ[2:0] are used whereas for NTSC only FSQ[1:0] is meaningful.
Furthermore, FSQ[0] represents ODD field when it is 0 and EVEN field when it is 1.
PRODUCT
PREVIEW