参数资料
型号: NCP1395APG
厂商: ON Semiconductor
文件页数: 22/27页
文件大小: 0K
描述: IC REG CTRLR PWM VM 16-DIP
标准包装: 25
PWM 型: 电压模式
输出数: 2
频率 - 最大: 1.11MHz
占空比: 52%
电源电压: 9.3 V ~ 20 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 16-DIP(0.300",7.62mm)
包装: 管件
其它名称: NCP1395APG-ND
NCP1395APGOS
NCP1395A/B
Protection Circuitry
This resonant controller differs from competitors due to
its protection features. The device can react to various
inputs like:
? Fast events input: Like an overcurrent condition, a
need to shutdown (sleep mode) or a way to force a
controlled burst mode (skip cycle at low output
power): as soon as the input level exceeds 1.0 V
typical, pulses are immediately stopped. On the
A version, when the input is released, the controller
performs a clean startup sequence without soft ? start
unless the feedback voltage goes down below 0.6 V
Vdd
Itimer
during fault time (please see above for details). The
B version restarts with a soft ? start sequence.
? Slow events input: This input serves as a delayed
shutdown, where an event like a transient overload
does not immediately stopped pulses but start a timer.
If the event duration lasts longer than what the timer
imposes, then all pulses are disabled. The voltage on
the timer capacitor (pin 3) starts to decrease until it
reaches 1.0 V. The decrease rate is actually depending
on the resistor the user will put in parallel with the
capacitor, giving another flexibility during design.
Figure 48 depicts the architecture of the fault circuitry.
Ctimer
Ctimer
UVLO
Reset
+
+ -
1 = fault
0 = ok
ON/OFF +
-
Vref Fault
+
Vref
+
-
+
NINV
Rtimer
Output
Current
Image
VtimerON
VtimerOFF
1 = ok
0 = fault
-
Out
CC Regulation
Compensation
+
Vref Fault
+
1 = ok
0 = fault
Slow Fault
Reset
DRIVING
LOGIC
SS
Fast Fault
A
B
A
B
To FB
Fast
Input
Figure 48. This Circuit Combines a Slow and Fast Input for Improved Protection Features
http://onsemi.com
22
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