参数资料
型号: MAX16046ETN+
厂商: Maxim Integrated Products
文件页数: 25/70页
文件大小: 0K
描述: IC EE-PROG SYS MGR 12CH 56-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 37
类型: 系统管理器
监视电压数目: 12
输出: 开路漏极,推挽式
复位: 低有效
复位超时: 可调节/可选择
电压 - 阀值: 可调节/可选择
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 56-WFQFN 裸露焊盘
供应商设备封装: 56-TQFN-EP(8x8)
包装: 管件
MAX16046/MAX16048
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
Table 7. FAULT1 and FAULT2 Output Configuration and Dependencies (continued)
REGISTER/
EEPROM
ADDRESS
18h
*MAX16046 only
BIT RANGE
[0]
[1]
[2]
[3]
[4]
[5]
[6]
[7]
DESCRIPTION
1 = FAULT2 is a digital output dependent on MON9*
1 = FAULT2 is a digital output dependent on MON10*
1 = FAULT2 is a digital output dependent on MON11*
1 = FAULT2 is a digital output dependent on MON12*
1 = FAULT2 is a digital output that depends on the overvoltage thresholds at the input
selected by r17h and r18h[3:0]
1 = FAULT2 is a digital output that depends on the undervoltage thresholds at the
input selected by r17h and 18h[3:0]
1 = FAULT2 is a digital output that depends on the early warning thresholds at the
input selected by r17h and r18h[3:0]
0 = FAULT2 is an active-low digital output
1 = FAULT2 is an active-high digital output
Fault-On Power-Up ( FAULTPU )
GPIO6 indicates a fault during power-up or power-
down when configured as a “fault-on power-up” output.
Under these conditions, all EN_OUT_ voltages are
pulled low and fault data is saved to nonvolatile
EEPROM. See the Faults section.
MARGINUP and MARGINDN
Configure GPIO2 and GPIO3 as margin-up
( MARGINUP ) and margin-down ( MARGINDN ) inputs,
respectively, for margining functionality. Pull
MARGINUP low and pull MARGINDN high to select
DACOUT_ voltage values set in registers r66h to r71h.
Pull MARGINDN low and pull MARGINUP high to select
DACOUT_ values set in registers r72h to r7Dh. Pull
both MARGINUP and MARGINDN high or low to select
DACOUT_ values set in registers r00h to r0Bh. See the
Voltage Margining section for more information on set-
ting DACOUT_ outputs for margining.
Margin-up and margin-down functionality is controlled
by GPIO2 and GPIO3 when configured for margining
(see Table 8). When MARGINUP or MARGINDN are
asserted, the DAC output switches are automatically
closed and the margin function is enabled. Writing to
the DAC-enabled registers (r1Ch and r1Dh) is not
required to close the DAC switches. See the MARGIN
section for an explanation of the margin function.
Table 8. MARGINUP and MARGINDN FUNCTION
MARGINUP
(GPIO2)
1
1
0
0
MARGINDN
(GPIO3)
1
0
1
0
DACOUT REGISTER USED
DACOUT registers r00h to r0Bh
MARGINDN registers r72h to r7Dh
MARGINUP registers r66h to r71h
DACOUT registers r00h to r0Bh
DACOUT
SWITCH STATE
Depends on r1Ch, r1Dh*
Closed
Closed
Depends on r1Ch, r1Dh*
* Note: r1Ch and r1Dh are located in the extended page.
Maxim Integrated
25
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